"> Search Jobs Find Jobs For Where Search Jobs ASIC Digital Verification, Sr. Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 6031 Remote Eligible No Date Posted 19/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As a Digital Verification Senior Engineer, you are passionate about technology and eager to drive pre-silicon functional verification of High-Speed PHY IPs. You have a dynamic personality and a strong desire to learn and excel in pre-silicon verification activities. With a solid understanding of digital design and HDL implementation, you are ready to take on complex challenges and contribute significantly to our innovative projects. You thrive in a diverse team environment and possess excellent debug and diagnostic skills, along with proficiency in scripting and automation using TCL, PERL, or Python. What You ll Be Doing: Working on Functional Verification of High-Speed PHY IPs for DDRxx, LPDDRxx, PCIex, Display, and HDMI protocol standards. Studying IP/design blocks/Firmware Specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Developing DV/Firmware test benches, test plans, and test cases. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs). Performing simulation, random and focused stimulus generation, and coverage analysis. Collaborating closely with digital designers for debugging and achieving desired coverage. Developing architecture and micro-architecture knowledge of complex digital design blocks under test. The Impact You Will Have: Ensuring the high quality and reliability of our High-Speed PHY IPs. Contributing to the successful delivery of cutting-edge technology solutions. Enhancing the performance and functionality of our products through rigorous verification. Driving innovation and excellence in our verification processes. Supporting the rapid integration of capabilities into SoC designs. Enabling our customers to bring differentiated products to market quickly with reduced risk. What You ll Need: B. Tech/M. Tech in EC/CS with 3-6 years of relevant experience in pre-silicon verification of complex PHY IPs, ASIC, or SoC designs. Understanding of functional verification flow with experience on industry-standard development and verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in System Verilog Assertions, code and functional coverage implementation, and review. Excellent debug and diagnostic skills. Experience with scripting and automation using TCL, PERL, or Python. Who You Are: You are a detail-oriented, analytical thinker with a strong problem-solving mindset. You possess excellent communication and collaboration skills, enabling you to work effectively within a diverse team. Your passion for technology drives you to stay updated with the latest advancements and continuously improve your skills. You are proactive, adaptable, and committed to delivering high-quality results in a fast-paced environment. The Team You ll Be A Part Of: You will join a dedicated team of engineers focused on the verification of High-Speed PHY IPs. Our team is committed to innovation and excellence, working collaboratively to ensure the highest standards of quality and performance. We value diversity and inclusivity, fostering an environment where every team member can thrive and contribute to our collective success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Staff Engineer - IP Verification Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 7271 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 5yrs to 10 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs Senior Staff R&D Engineer - Platform Architect Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 10311 Date posted 03/27/2025 Share this job Email LinkedIn X Facebook We are developing next generation Platform Architect tool to design and explore SoC Architecture, Analysis and Optimization for Performance and Power. The tool provides integrated graphical environment and is developed in an Object-Oriented way with C++ and GUI frontend as Qt. As a senior member of the R&D team of Platform Architect product in Synopsys, you will be responsible for, Development and improvement of features, flows and solutions for problems which maybe new and very open-ended to enhance the value provided by the product. The work will require algorithm, data structure design as well as developing robust, efficient, and flexible implementations. The engineer is expected to specify, design, implement and test in a large and complex software development environment. Works closely with global cross-functional teams in defining, implementing, and delivering the solutions. Quality execution of software development projects, taking responsibility for designing, developing, troubleshooting, or debugging software programs. Creation of reliable plans and effort estimates for your projects and works with minimal direction from manager. Education BE / B. Tech / M. Tech or equivalent in Computer Science or Electronics Exceptional education background in school and college Experience 8-15 Years Technical Skills Essential: Strong hands-on experience in C/C++ based Object Oriented large and complex enterprise software development. Strong background in Design Patterns, Data Structure, Algorithms , and programming concepts. Well versed with Software Engineering and development processes. Exposure to developer tools such as gdb/ddd, Valgrind, Quantify, Visual Studio and Eclipse. Exposure with source code control tool like Perforce, Clearmake, CVS or Git . Working on Linux platform. Good analysis and problem-solving skills. Desirable: Experience in EDA domain Experience with User Interface development Exposure to Qt UI development tool kit Exposure to Tcl, Python, Shell scripting and/or Vim Exposure to Windows platform M.Tech or equivalent Personal Attributes Highly enthusiastic and energetic team player with the ability to go an extra mile. Good written and verbal communication skills. Good presentation skills. Strong desires to learn and explore new technologies. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Sr Staff Engineer Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 10737 Date posted 04/23/2025 Share this job Email LinkedIn X Facebook We Are: You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 8-15 years of experience, you bring a wealth of knowledge in software architecture and leadership. You excel in C/C++ software development, and your strong background in design patterns, data structures, and algorithms sets you apart. You thrive in multi-threaded and distributed code environments, and your familiarity with ASIC design flow and EDA tools is second to none. Your expertise in Verilog, SystemVerilog, and VHDL HDL, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind, and you understand the importance of source code control tools such as Perforce. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You ll Be Doing: - Designing, developing, and troubleshooting core algorithms for word-level synthesis. - Collaborating with local and global teams to enhance synthesis QoR, performance, and logic interference. - Engaging in pure technical roles focused on software development and architecture. - Implementing multi-threaded and distributed code solutions. - Utilizing your knowledge of ASIC design flow and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL HDL to develop cutting-edge solutions. The Impact You Will Have: - Driving technological innovation in chip design and verification. - Enhancing the performance and quality of synthesis tools used globally. - Solving complex logic interference problems to improve design accuracy. - Contributing to the development of high-performance silicon chips and software content. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You ll Need: - Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Familiarity with multi-threaded and distributed code development. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: - Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You ll Be A Part Of: You will be part of the word-level synthesis team, catering to multiple EDA products. This team focuses on developing innovative solutions to improve synthesis quality of results (QoR), performance, and logic interference. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs SOC Engineering, Staff Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 8601 Remote Eligible No Date Posted 22/04/2025 Alternate Job Titles: Staff SOC Engineer Senior SOC Design Engineer Lead SOC Engineer We Are: You Are: You are an experienced and motivated SOC Engineer with a passion for cutting-edge technology and innovation. With a strong background in system-on-chip (SOC) design and verification, you bring a wealth of knowledge and a keen eye for detail. You thrive in a collaborative environment, working seamlessly with cross-functional teams to deliver high-quality solutions. Your problem-solving skills are exceptional, and you have a proven track record of successfully managing complex projects. You are proactive, adaptable, and always eager to learn and grow in a dynamic and fast-paced setting. What You ll Be Doing: Designing and implementing SOC solutions for various applications, ensuring high performance and reliability. Collaborating with cross-functional teams to define and develop SOC architecture and specifications. Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements. Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives. Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies. Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation. Job Description and Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG). At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, methodology to enable our customers complete their most challenging SoC Design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality and RTL Design. The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors. Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC. Understand the design/architecture and develop timing constraints for synthesis and timing. Run preliminary synthesis to ensure that the design can be synthesized as intended. Run formality to ensure equivalence of RTL and gates. Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer. Required B.E/B. Tech/M.E/M. Tech in electronics with 4-9 years experience in RTL Design and Verification. Hands-on experience on static verification tools such as Spyglass performing LINT, CDC, RDC. Good conceptual understanding of design/architecture pitfalls across clock/reset domain crossing. Good conceptual understanding of RTL rule checks. Hands-on experience on synthesis and timing constraints development. Candidates with experience on ARM based technologies (Coresight Debug, Processor architecture, etc.) will be preferred. The Team You ll Be A Part Of: You will join a highly skilled and motivated team dedicated to developing advanced SOC solutions. Our team focuses on innovation, collaboration, and excellence, working together to deliver high-quality designs that drive technological advancements. We value diversity and inclusion, fostering a supportive and dynamic environment where every team member can thrive and contribute to our success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

"> Search Jobs Find Jobs For Where Search Jobs Lead R&D Software Engineer - VC Spy Glass Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 10120 Date posted 03/21/2025 Share this job Email LinkedIn X Facebook Job description (VC Spyglass Lint Technology on VC Platform) Responsible for designing, developing, troubleshooting the core VC-Static engine, which is integral part of Lint Design and develop Lint standard and customized Lint checks using VC Platform technologies for analysis, synthesis and simulations. Will be working closely with other teams both locally and globally Design and development of state of the art EDA tools involving development in one or more of the following areas-: developing new and innovative algorithms in the area of electronic design automation. Skills Required 4 to 10 years of Software development experience Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Fluent in C++ with work experience in data-structures and algorithms. Excellent algorithm analysis skills and a good knowledge of data structures. Good knowledge of Tcl and Perl-based development on Unix. Good knowledge of Verilog, SystemVerilog & VHDL HDL. Ability to develop new architecture Knowledge on GenAI is Value added Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success Quality focus - one who believes in quality and wants to make a difference Experience of production code development on Unix/Linux platforms. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs Sr R&D Manager - Platform Architect Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 10530 Date posted 04/15/2025 Share this job Email LinkedIn X Facebook Job Description We are developing next generation Platform Architect tool to design and explore SoC Architecture, Analysis and Optimization for Performance and Power. The tool provides integrated graphical environment and is developed in an Object-Oriented way with C++ and GUI frontend as Qt. As a senior member of the R&D team of Platform Architect product in Synopsys, you will be responsible for, Development and improvement of features, flows and solutions for problems which maybe new and very open-ended to enhance the value provided by the product. Drives the initiative visibly within the group and is recognized as the leader and owner of the initiative. The work will require algorithm, data structure design as well as developing robust, efficient, and flexible implementations. The engineer is expected to specify, design, implement and test in a large and complex software development environment. Works closely with global cross-functional teams in defining, implementing, and delivering the solutions. Quality execution of software development projects, taking responsibility for designing, developing, troubleshooting, or debugging software programs. Creation of reliable plans and effort estimates for your projects and works with minimal direction from manager. Maintaining keen focus on innovation to ensure continuous product enhancements. Education BE / B. Tech / M. Tech or equivalent in Computer Science or Electronics Exceptional education background in school and college Experience 12-18 Years Technical Skills Essential: Strong hands-on experience in C/C++ based Object Oriented large and complex enterprise software development. Strong background in Design Patterns, Data Structure, Algorithms , and programming concepts. Well versed with Software Engineering and development processes. Exposure to developer tools such as gdb/ddd, Valgrind, Quantify, Visual Studio and Eclipse. Exposure with source code control tool like Perforce, Clearmake, CVS or Git . Working on Linux platform. Good analysis and problem-solving skills. Desirable: Experience in EDA domain Experience with User Interface development Exposure to Qt UI development tool kit Exposure to Tcl, Python, Shell scripting and/or Vim Exposure to Windows platform M.Tech or equivalent . Personal Attributes Highly enthusiastic and energetic team player with the ability to go an extra mile. Good written and verbal communication skills. Good presentation skills. Strong desires to learn and explore new technologies. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Staff Engineer (VIP verification) Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 8828 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 5yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

Developing SignOff ECO optimization algorithms and heuristics. Debugging issues related to design loading and timing/power optimization. Striving for continuous improvements in QoR to achieve faster timing convergence with optimal power overhead. Collaborating with a team of engineers to develop technical solutions to complex problems. Communicating with product engineers to understand and define problem scope. Ensuring strict performance and quality requirements are met. The Impact You Will Have: Enhancing the performance and efficiency of PrimeClosure, the industrys first AI-driven signoff ECO solution. Contributing to the development of cutting-edge algorithms that optimize timing and power in chip design. Improving the overall quality and reliability of our products through rigorous debugging and testing. Driving innovation and continuous improvement in our engineering processes. Supporting customer success by resolving issues and implementing new features based on their feedback. Helping shape the future of AI-driven optimization in the semiconductor industry. What You ll Need: A degree in Computer Science or Electronics. 5+ years of experience in relevant field Strong analytical and problem-solving skills. Proficiency in C/C++ and Linux. Excellent communication and teamwork abilities. A passion for technology and innovation. Who You Are: A collaborative team player who thrives in a dynamic and innovative environment. A proactive and self-motivated individual with a strong attention to detail. An excellent communicator who can articulate complex ideas clearly and effectively. A creative thinker who is always looking for new ways to solve problems and improve processes. A dedicated professional committed to delivering high-quality work

Hands-on experience of implementing digital block using state of the art gate to GDSII ASIC flows mainly including Design Initialization, Power planning, Floor planning/Macro placement, Scan-chain reordering, CTS, Route and chip finishing steps Perform Physical Implementation of blocks starting from gate netlist till gds out Perform signoff verifications including Layout verifications (DRC, LVS, Antenna) and Reliability verifications (EMIR, ESD) of the implemented blocks Ownership of writing MCMM and UPF for the block designs Provide handoff data to other signoff closure like STA, Formality, Layout and Reliability verification Job Requirements In-depth understanding of the ASIC Physical design flow steps of starting from Gate netlist Experience in Testchip implementation and testing exposure is a plus Exposure to Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV) is highly desirable Exposure to FinFET designs is desirable Experience in working on IO integration with Wire-bond or Flip-chip design would be big plus Experience : Min 5 years of Relevant Physical design domain Education : B.E/B.Tech/M.Tech in ECE/EE

"> Search Jobs Find Jobs For Where Search Jobs Senior Research and Development Engineer Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 9923 Date posted 03/06/2025 Share this job Email LinkedIn X Facebook Alternate Job Titles: Senior Research and Development Engineer Senior R&D Engineer Lead R&D Engineer We Are: You Are: You are a driven and innovative engineer with a passion for developing and maintaining robust infrastructure systems. With a background in Electrical Engineering or Computer Science, you have honed your skills in Python or Perl, and have a deep understanding of OOPS concepts and design patterns. You thrive in dynamic environments and possess the ability to manage system builds, configurations, patches, upgrades, and testing. Your experience as a DevOps engineer has equipped you with the knowledge to automate infrastructure tasks and develop best practices around monitoring performance and availability. As an effective communicator and collaborative team player, you can work seamlessly with teams across different geographies. You are a self-starter who learns quickly and demonstrates a keen attention to detail. Your high energy and willingness to go the extra mile make you an asset to any team. You are not just looking for a job but a place where you can make a significant impact and grow with the company. What You ll Be Doing: Be responsible for the ongoing growth and stability of the infrastructure as we continue to add and develop new tools and services. Automate processes using continuous integration tools like Jenkins. Manage system builds, configurations, patches, upgrades, and testing. Design, develop, debug, and manage development and test environments. Develop best practices around monitoring performance and availability through new or existing tools. Write technical and user documentation such as FAQs and Handbooks. The Impact You Will Have: Ensure the stability and scalability of our infrastructure, supporting the growth of new tools and services. Enhance the efficiency and reliability of development and testing environments. Improve the automation of infrastructure tasks, reducing manual intervention and errors. Develop and implement best practices for performance monitoring, ensuring high availability of systems. Provide clear and comprehensive documentation, aiding in the smooth operation and understanding of systems. Collaborate with cross-functional teams to drive innovation and continuous improvement. What You ll Need: Bachelors or Masters in Electrical Engineering or Computer Science from a reputed university/institution. 3 - 6 years of proven experience in an operations or engineering role. Strong proficiency in Python or Perl. Good understanding of OOPS concepts and design patterns. Experience as a DevOps engineer working on automating infrastructure tasks. Proficient in Source Control Management, including Perforce and Git. Solid understanding of Linux and ideally Windows. Who You Are: High energy person with the willingness to go the extra mile. Demonstrate ability to be a self-starter and learn quickly. Excellent communication and presentation skills. Able to work with teams across geography. Collaborative and maintaining an open and friendly atmosphere to encourage productivity, creativity, and innovation. The Team You ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and maintaining the infrastructure that supports our cutting-edge technology. Our team values collaboration, creativity, and continuous improvement, and we work closely with cross-functional teams to drive the success of our projects. Together, we strive to ensure the stability, scalability, and performance of our systems, enabling Synopsys to lead in technological innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. COPILOT At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

Building quality setup environments based on technology data from worldwide foundries. Writing scripts to automate processes and perform quality assurance on the environment. Working with EDA tools, including simulators and verification tools. Collaborating with local and international experts to find solutions to complex problems. Working independently while building productive working relationships with cross-functional teams. Continuously learning and exploring new technologies to enhance your skills and knowledge. The Impact You Will Have: Contributing to the creation of high-quality setup environments that enable efficient technology development. Automating processes to improve efficiency and accuracy in the engineering workflow. Enhancing the functionality and reliability of EDA tools through rigorous testing and verification. Solving complex problems by leveraging expertise from diverse, global teams. Fostering a collaborative environment that promotes innovation and continuous improvement. Driving the success of Synopsys projects and initiatives with your technical skills and dedication. What You ll Need: A bachelors degree and a minimum of 2 years of related experience or an advanced degree in Electronics/Electrical Communication Engineering/Cybernetics or a similar field. Proficiency in at least one programming language such as Python, Tcl, or Perl. An exceptional desire to learn and explore new technologies. Good investigation and problem-solving skills. Familiarity with physical verification flows like LVS/DRC/FILL/DFM and an understanding of layout design rules. Prior experience in Analog design is a plus. Knowledge and experience in tool/runset development/support is a plus. Experience in a UNIX/Linux environment. Strong communication skills and the ability to build productive internal and external working relationships. Who You Are: A collaborative team player who thrives in a diverse and multicultural environment. An independent worker who can manage tasks with minimal supervision. An effective communicator who can convey technical information clearly and concisely. An innovative thinker who is always looking for ways to improve processes and solve problems. A dedicated professional with a passion for technology and a commitment to continuous learning

Supporting the existing functionality of our tools and continually enhancing their versatility, performance, and memory utilization while improving software quality. Applying extensive knowledge of algorithms and data structure design to develop robust and efficient implementations that improve tool performance and customer adoption. Interacting with other Synopsys R&D members and customers to understand their needs and product goals. Contributing to the development of complex software code-based tools in a multi-person product development environment with high dependencies and tight schedules. Exercising judgment in developing methods, techniques, and evaluation criteria to meet project goals. Collaborating with a team of enthusiastic and creative engineers to drive innovation and excellence. The Impact You Will Have: Enhancing the performance and quality of our verification tools, leading to increased customer satisfaction and adoption. Driving continuous improvement in software development processes and practices. Contributing to the development of cutting-edge technologies that power innovations in various industries. Helping Synopsys maintain its leadership position in the market by delivering high-performance solutions. Influencing the direction and success of our hardware verification tools through your expertise and innovation. Fostering a collaborative and innovative work environment that encourages growth and learning. What You ll Need: A Bachelor s degree in Electrical / Electronics / Computer-Science Engineering with a minimum of 8 years of related experience, or a Master s degree with 6 years of relevant experience. In-depth understanding of data structures, algorithms, and their applications. Excellent software development experience with C/C++ on UNIX/Linux platforms. Exposure to Python, TCL, and shell scripting languages is preferable. Exposure to HDL languages like Verilog or System Verilog is desirable, with a willingness to learn their nuances. Demonstrated history of good analytical, debugging, and problem-solving skills. Experience with complex and large software code-based tool development

You are a highly motivated and experienced Analog Design Engineer with a passion for developing state-of-the-art analog sensors You thrive in a collaborative environment and have a knack for solving complex problems Your strong technical expertise in full custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization sets you apart You are a forward-thinking individual who is always looking for innovative solutions and has excellent communication and mentoring skill You possess a BTechor MTech degree in Electrical Engineering with over 5 years of relevant industry experience, or a PhD with relevant experience You have a deep understanding of custom Analog/AMS design techniques, implementation, and verification, and you are familiar with the challenges of advanced processes, including ESD and reliability What You ll Be Doing: Developing new solutions in the field of on-die monitoring. Liaising with the layout team to achieve the best possible engineering solutions. Deploying new sensors into test chips and conducting post-silicon characterization. Guiding and mentoring junior engineers and tracking their work. Conceptualizing, designing, and productizing state-of-the-art analog sensors. Collaborating with cross-functional teams to ensure successful project execution. The Impact You Will Have: Contributing to the development of next-generation intelligent in-chip sensors. Enhancing the performance, power, area, schedule, and yield of our customers products. Improving the reliability of various target applications through innovative solutions. Advancing the field of on-die monitoring with cutting-edge technologies. Driving the integration of full hardware IP, test, and end-to-end solutions. Supporting the continuous technological innovation that powers the Era of Smart Everything. What You ll Need: Strong technical experience in full custom analog/mixed-signal circuit design. Proficiency in circuit simulations and custom layout techniques. Experience with post-silicon characterization and deployment of new sensors. Sound knowledge of custom Analog/AMS design techniques, implementation, and verification. Awareness of advanced process challenges, including ESD and reliability. Who You Are: A forward-thinking engineer with a design-oriented mindset. An excellent team player with strong communication and interpersonal skills. A mentor who can guide and support junior engineers. A problem solver who thrives in a collaborative environment. A lifelong learner who stays updated with the latest industry trends and technologies.

Develop CMOS embedded memories such as SP SRAM, DP SRAM, Register File, and ROM: Design architecture and circuit implementation, especially ultra high speed, ultra low power, or high-density design portfolio. Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification and validation. Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation and full verification flow. Perform bit cell development and bit cell verification, and drive physical layout design and verification. Provide support and/or perform other duties as assigned and required In this role, the Senior Engineer will be part of team contributing to Different type of Architectures of embedded SRAM, Register files and ROM. As senior Engineer, the individual will be involved in challenging projects and drive it to completion in defined timelines. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan. Your expertise in deep submicron technology and Finfet, SRAM design , processor design , Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team. You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule. Skills/Experience: BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from premium institute/university with minimum of 1 years of experience in VLSI Design Deep understanding of SRAM/Register File architectures and advanced custom circuit implementations. Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation. Direct experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometre technology nodes W mastery in scripting using Perl, python for automation . Fundamentals: Understanding of RC circuit of 1 st and 2 nd order. Basics of Digital design (realization of Boolean function using Gates, Mux etc) Fundamentals of Transfer function and its analysis for stability etc. Strong CMOS fundamentals Knowledge of CMOS fabrication Good digital design knowledge Exposure to basic analog fundamentals

An experienced Verification Engineer who is passionate about technology and innovation. You are a problem-solver at heart with a strong foundation in digital design concepts and hands-on experience in programming with C++ and HDL languages. You thrive in collaborative environments and are comfortable taking on individual contributor or tech-lead roles. You are eager to work on cutting-edge technology, particularly in the field of emulation mode development and deployment for Zebu. Your technical expertise is complemented by excellent communication skills and a team-oriented mindset. What You ll Be Doing: * Developing and deploying emulation models for Zebu, focusing on bus protocols like PCIe, USB, CSI, and DSI. * Implementing designs in C++, RTL, and SystemVerilog-DPIs. * Collaborating with cross-functional teams to ensure seamless SoC bring-up and software development in pre-silicon environments. * Creating and optimizing use models and applications for various emulation projects. * Conducting thorough verification and validation processes to ensure the highest quality of emulation models. * Providing technical guidance and mentorship to junior team members when necessary. The Impact You Will Have: * Enhancing the efficiency and effectiveness of our emulation models, significantly reducing time-to-market for new technologies. * Contributing to the development of high-performance silicon chips that power a wide range of applications, from consumer electronics to advanced computing systems. * Ensuring the reliability and robustness of our verification processes, thereby improving the overall quality of our products. * Driving innovation within the team, pushing the boundaries of what is possible in emulation and verification. * Playing a crucial role in the successful bring-up of SoCs, enabling software development in pre-silicon environments. * Fostering a collaborative and inclusive team culture that values continuous learning and improvement. What You ll Need: * Strong programming skills in C++ and a solid understanding of object-oriented programming concepts. * 5+ years of experience in relevant domain * Proficiency in HDL languages such as System Verilog and Verilog. * Familiarity with digital design concepts and verification methodologies. * Experience with scripting languages like Perl or TCL is a plus. * Knowledge of protocols such as ENET, HDMI, MIPI, AMBA, and UART is advantageous. Who You Are: * An excellent communicator who can articulate complex technical concepts clearly and effectively. * A proactive team player who is flexible, resourceful, and responsible. * An innovative thinker who is always looking for ways to improve processes and outcomes. * A detail-oriented professional who values quality and precision in their work. * A lifelong learner who stays updated with the latest industry trends and technologies.

You are a highly skilled and motivated GenAI/LLM Researcher/Engineer with a passion for pioneering advancements in the field of General Artificial Intelligence and Large Language Models. With a strong foundation in AI/ML and software development, you are adept at leveraging your expertise to revolutionize the Electronic Design Automation (EDA) domain. Your in-depth understanding of UVM and EDA tools is complemented by your ability to collaborate effectively with cross-functional teams. You thrive in a dynamic environment, where your innovative mindset and problem-solving abilities drive the development of cutting-edge solutions. Your proactive approach to staying updated with industry trends and advancements ensures that you remain at the forefront of AI technology. What You ll Be Doing: Research and develop novel GenAI/LLM-based solutions for EDA applications, such as Design automation, Verification, and Optimization. Focus on UVM automation using GenAI techniques. Collaborate with cross-functional teams to integrate GenAI/LLM technologies into existing EDA tools and workflows. Design, implement, and optimize AI models using popular frameworks (e.g., TensorFlow, PyTorch). Develop software applications and tools to demonstrate GenAI/LLM capabilities in EDA. Publish research papers and present at conferences to showcase innovative solutions. Stay up-to-date with industry trends and advancements in GenAI/LLM. Work closely with customers to understand their needs and provide tailored solutions. Participate in agile development methodologies, ensuring timely delivery of high-quality solutions. The Impact You Will Have: Drive innovation in the EDA domain through the application of cutting-edge GenAI/LLM technologies. Enhance the efficiency and accuracy of design automation and verification processes. Contribute to the development of state-of-the-art AI models that set new industry standards. Facilitate the integration of advanced AI solutions into existing workflows, improving overall productivity. Shape the future of EDA by introducing novel, AI-driven methodologies. Establish Synopsys as a leader in the application of GenAI/LLM in the semiconductor industry. What You ll Need: Bachelors/Masters in Computer Science, Electrical Engineering, or related field. 5+ years of experience in AI/ML research and development. Strong programming skills in Python, C++, or Java. Experience with popular AI/ML frameworks (e.g., TensorFlow, PyTorch). Familiarity with EDA tools and workflows, and prior experience in UVM. Excellent problem-solving skills and analytical thinking

The candidate would be part of the VIP group responsible for development of Verification IPs. Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification. The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment. This is an opportunity to work with best-in-class verification, debug tools, Design IP & close collaboration with best protocol experts in the industry. You will work with highly professional and motivated colleagues who value and support your contribution. Requirements: Bachelors/masters with good academic record. 7+ years experience in developing HVL based verification environments, preferably using System Verilog. Exposure to coverage driven verification. Experience in verification methodologies like UVM/OVM. Exposure to complex SV test benches involving multiple protocols and VIPs. Experience in VIP development is highly desirable. Should have a strong work exposure on any of the industry standard protocols like PCIe, USB, Ethernet, MIPI etc.. Demonstrates good analysis and problem-solving skills. Have a strong passion for work and driving things to closure.

Design and develop software for interface IP systems Perform Device level and System level, validation and debug, in post-silicon Software Development for new validation methodologies Customer interface to capture requirement and post release support Maximize software productivity and faster time to knowledge Qualifications: Qualification: B.Tech in ECE/CS or equivalent with 4+ year of relevant experience ECE background with experience is software is preferred Skills: Excellent programming and testing skills using C/C++ Experience with embedded or resource-constrained environments Development experience on Unix, Linux and Windows Ability to pick up new flow, learn on the Job MATLAB & PYTHON programming exposure is plus Excellent verbal and written communication skill

* Identify verification environment requirements from its various sources (Specifications, Design functionality, Interfaces, etc ) * Generate verification test plan, verification environment documentation and test environment usage documentation * Define, develop, and verify complex UVM verification environments * Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) * Collaborate with architect, designers , VIP team to accomplish tasks. * Identify design problems, possible corrective actions and/or inconsistencies on documented functionality * Work with peers to improve methodologies and improve execution efficiency. * Adhere to quality standards and good test and verification practices. * Work as a lead, mentor junior engineers, and help them in debugging complex problems. * Able to Support Customer issues, by their reproduction and analysis. * Should be able multitask between different activities. Key Qualifications * Proven desire to learn and explore new state of the art technologies * Demonstrate good written and spoken English communication skills * Demonstrate good review and problem-solving skills * Knowledgeable with Verilog, VHDL and/or SystemVerilog * Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus * Understanding of verification methodology such as UVM . * Good organization and communication skills * Be a solution provider. * 8+ years of relevant experience