ASIC Physical Design, Staff Engineer

Job Description

Hands-on experience of implementing digital block using state of the art gate to GDSII ASIC flows mainly including Design Initialization, Power planning, Floor planning/Macro placement, Scan-chain reordering, CTS, Route and chip finishing steps Perform Physical Implementation of blocks starting from gate netlist till gds out Perform signoff verifications including Layout verifications (DRC, LVS, Antenna) and Reliability verifications (EMIR, ESD) of the implemented blocks Ownership of writing MCMM and UPF for the block designs Provide handoff data to other signoff closure like STA, Formality, Layout and Reliability verification Job Requirements In-depth understanding of the ASIC Physical design flow steps of starting from Gate netlist Experience in Testchip implementation and testing exposure is a plus Exposure to Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV) is highly desirable Exposure to FinFET designs is desirable Experience in working on IO integration with Wire-bond or Flip-chip design would be big plus Experience : Min 5 years of Relevant Physical design domain Education : B.E/B.Tech/M.Tech in ECE/EE