You are a seasoned digital verification engineer with a passion for innovation and problem-solving With a BE/b-tech degree in electronics or a related engineering field, you bring 3-5 years of hands-on experience in digital verification Your proficiency in system verilog, UVM, coupled with a strong understanding of formal verification techniques, sets you apart You thrive in UNIX/Linux OS environment and have a keen interest in exploring new technologies Your ability to build UVM based testbenches , along with your prior knowledge of EDA tools and simulators, makes you an ideal candidate Excellent English communication skills and the ability to compile verification plans and strategies are essential for this role, What Youll Be Doing: Creation of test plans Development of testbenches Creation of tests both directed and random Functional coverage modelling and review, Code coverage review Debugging and resolving mismatches between design and C-model Integration of third party and internal verification IP Review and improvement of verification test suites and testbench Mentor junior team members Creation of Test plan, test strategy Coverage databases (Fully traceable from test plan and specification) The Impact You Will Have: Driving innovation in processor verification techniques Enhancing the efficiency and effectiveness of our verification mechanisms Contributing to the development of cutting-edge technology that sets Synopsys apart in the industry Ensuring high-quality IP delivery through rigorous verification Supporting the continuous improvement of our hardware verification processes What Youll Need: Bachelors degree in engineering from a reputed college Minimum 3+ years of relevant experience Microprocessor verification experience is an advantage Hands-on experience with SystemVerilog and Verilog Proficiency with Verification methodologies: UVM/OVM Programming skills: C, assembly, Perl, makefile generation Experience with latest verification techniques like formal, low-power, safety etc is an added advantage Who You Are: Innovative thinker with a passion for technology Excellent communicator and collaborator Detail-oriented and highly organized Adept at problem-solving and critical thinking Proactive and self-motivated The Team Youll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and verifying ARC processor IPs Our team values collaboration, creativity, and continuous improvement, and we are dedicated to pushing the boundaries of technology to deliver exceptional products,

What You ll Need: Proficiency in presentation creation tools (e.g., PowerPoint) and enterprise content management systems (e.g., SharePoint). Strong understanding of electronic engineering principles and practices across various disciplines. Excellent written and verbal communication skills with the ability to simplify complex technical information. Ability to create and edit multimedia content including presentations, charts, graphics, videos, voiceovers, and animations. Strong organizational and project management skills, with the ability to manage multiple priorities effectively. Who You Are: A team player who can work effectively both independently and as part of a team. An analytical thinker with strong problem-solving skills. Someone with a Bachelors degree in Electronic Engineering, Technical Communication, Education, or a related field (a Master s degree is a plus). An experienced professional with at least 5 years of experience in technical writing, instructional design, or a related field within an engineering environment.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: As an ideal candidate, you are a seasoned professional with a passion for innovation and a deep understanding of ASIC design and verification You have a proven track record in developing high-level verification environments using System Verilog/UVM and possess a keen eye for detail Your expertise in memory interface protocols like DDR and LPDDR sets you apart, and you excel in debugging and problem-solving skills You are self-motivated and possess excellent communication skills, enabling you to work seamlessly within global teams Your leadership abilities allow you to guide technical teams and enhance verification strategies and test environments, ensuring high-quality deliverables, What Youll Be Doing: Specify, design, and implement state-of-the-art verification environments for the DesignWare family of synthesizable cores, Perform verification tasks for IP cores, working closely with RTL designers, Drive ownership of critical areas of verification along with a team of talented verification engineers, Manage and own a team to develop and implement advanced test plans and test environments at both unit and system levels, Code and debug test cases, implementing complex checkers and assertions, Extract and review functional coverage (FC) and code coverage metrics, ensuring quality metric goals are met, Manage regressions and contribute to the continuous improvement of verification strategies and test environments, The Impact You Will Have: Enhance the quality and efficiency of our verification processes, ensuring robust and reliable IP cores, Contribute to the development of cutting-edge technologies that power the Era of Smart Everything, Enable the creation of high-performance silicon chips and software content, driving innovation in various industries, Collaborate with a global team of experienced verification engineers, fostering a culture of knowledge sharing and continuous learning, Play a key role in the success of Synopsys DesignWare IP Verification R&D team, contributing to our leadership in chip design and software security, What Youll Need: BS/MS in Electrical Engineering or Electronics and Communication Engineering with 10+ years of relevant experience, Proven experience in developing HVL (System Verilog/UVM) based test environments, Expertise in developing and implementing test plans, checkers, and assertions, Proficiency in extracting verification metrics such as functional coverage and code coverage, Experience with memory interface protocols (DDR, LPDDR) and IP design and verification processes, Who You Are: You are a detail-oriented, self-motivated individual with strong problem-solving skills Your excellent communication skills enable you to work effectively within global teams You possess deep knowledge of HDLs such as Verilog and scripting languages like shell/Perl/Python, and you thrive in a project and team-oriented environment, The Team Youll Be A Part Of: You will be part of the DesignWare IP Verification R&D team at Synopsys, working closely with RTL designers and a global team of experienced verification engineers This team focuses on developing state-of-the-art verification environments for synthesizable cores, contributing to the success of Synopsys Design & Verification domain, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

Collaborating with R&D and Application Engineers to define and validate the latest hybrid emulation technologies. Engaging in field discussions with customers to provide expert insights and advanced debugging support. Participating in strategic bring-ups to ensure successful implementation of new technologies. Conducting product validation to ensure the highest quality and performance standards are met. Creating and maintaining comprehensive documentation for our products. Developing and delivering training sessions to enhance the knowledge and skills of internal teams and customers. The Impact You Will Have: Driving the adoption and usability of our hybrid emulation technologies among customers. Providing valuable technical insights that influence the direction of product development. Ensuring the successful deployment of new technologies through strategic bring-ups and customer support. Maintaining high standards of product quality and performance through rigorous validation processes. Enhancing the technical knowledge and capabilities of internal teams and customers through effective training. Contributing to the continuous improvement and innovation of our products. What You ll Need: Extensive experience in hybrid emulation and related technologies. Strong technical expertise in product validation, advanced debugging, and strategic bring-ups. Proficiency in creating and maintaining comprehensive product documentation. Excellent communication and presentation skills for delivering effective training sessions. Ability to work collaboratively with R&D and other Application Engineers.

You are a seasoned professional with a strong background in Static Timing Analysis (STA) and Synopsys Design Constraints (SDC) Your expertise in RTL and System Verilog, along with your proficiency in scripting languages like Perl, Tcl, or Python, makes you stand out You have a deep understanding of front-end EDA design methodologies and experience with logic synthesis tools Your prior experience with SDC tools and RTL simulation is a significant plus You are an excellent communicator, capable of producing detailed product requirement documents, and you have a knack for translating customer needs into actionable insights for our R&D team With a BS in Electrical or Computer Engineering and over 10 years of experience in STA/Synthesis/Front-End Flows, you are ready to take on a leadership role and drive innovation at Synopsys, What Youll Be Doing: Collaborating with customers to ensure our SDC Constraints solution meets their expectations, Developing and integrating design methodologies with other Synopsys products, Tracking customer engagements and communicating status with Marketing and Upper Management, Preparing and delivering technical presentations to customers and Field Application Engineers (FAEs), Creating customer training material related to our SDC Constraints solution, Routinely meeting with customers to understand their key priorities and communicating these internally, Providing technical direction to our R&D team and championing key customer requests, The Impact You Will Have: Enhancing customer satisfaction by ensuring our solutions meet their needs and expectations, Driving the integration of our SDC Constraints solution with other Synopsys products, enhancing overall product offerings, Improving communication and collaboration between customers, marketing, and upper management, Empowering customers and FAEs with comprehensive technical knowledge through effective presentations and training materials, Influencing product development by providing valuable insights and priorities from customer feedback, Ensuring the continuous improvement and innovation of our SDC Constraints solution, What Youll Need: Proficiency with STA, SDC, Proficiency with RTL, System Verilog, Strong understanding of front-end EDA design methodologies, Strong Perl, Tcl, or Python scripting skills, Prior experience with logic synthesis tools, Prior experience using or supporting SDC tools (a significant plus), Prior experience with RTL simulation and SVA (a plus), Sound communication skills, both verbal and written, Ability to produce detailed product requirement documents, BS in Electrical or Computer Engineering with 10+ years of experience in STA/Synthesis/Front-End Flows, Who You Are: You are a highly skilled and experienced engineer with a passion for technology and innovation You possess excellent problem-solving abilities and have a customer-centric mindset You are a great communicator and collaborator, capable of working effectively with cross-functional teams

What You ll Be Doing: Configure, calibrate, and maintain test equipment such as oscilloscopes, logic analyzers, signal generators, and power supplies. Assist in assembling and setting up test benches for silicon validation, ensuring signal integrity and proper connectivity. Support high-speed interface testing, particularly for PCIe, Ethernet, and other serial communication protocols. Perform PCB rework, soldering, and desoldering of surface-mount (SMD) and through-hole components. Work closely with validation engineers to execute pre-silicon and post-silicon validation tests. Capture, analyze, and document test data using lab measurement tools. Troubleshoot hardware issues, connectivity problems, and signal integrity challenges related to PCIe and Ethernet interfaces. Maintain detailed logs of test results, test setups, and debugging activities. Assist in generating test reports and summaries for engineering teams. Ensure compliance with ESD protection guidelines and ISO standards for lab operations. Organize lab space and maintain an inventory of test equipment, components, and accessories. Ensure lab equipment is functional and regularly serviced for optimal performance. Follow standard operating procedures (SOPs) for equipment handling and storage. Manage procurement requests for test equipment and consumables, coordinating with vendors and internal teams. The Impact You Will Have: Ensure the seamless execution of validation activities, contributing to the high-quality standards of our products. Support the development and validation of cutting-edge silicon technologies, pushing the boundaries of innovation. Maintain a well-organized and efficient lab environment, enabling the engineering team to focus on core development tasks. Provide critical data and insights through meticulous documentation and reporting, aiding in informed decision-making. Enhance the reliability and performance of our hardware through thorough testing and troubleshooting. Contribute to the continuous improvement of lab operations and processes, ensuring compliance with industry standards. What You ll Need: Bachelors degree (B.Tech/B.E.) in Electrical, Electronics. 2 years of experience in a semiconductor validation or hardware testing lab. Hands-on experience with electronic lab equipment (oscilloscopes, multimeters, power analyzers, etc.). Basic understanding of PCB schematics, signal integrity, and electrical debugging. Familiarity with high-speed interfaces, including Ethernet and PCIe. Working knowledge of Python, MATLAB, and C for test automation is a plus. Strong problem-solving skills and attention to detail.

Create architectural approaches for Enterprise Network design and implementation. Provide architectural governance and oversight over MSP supplied solutions. Explore, investigate, recommend, benchmark, and implement technologies for SDN and service orchestration. Offer in-depth Network & Security Operations subject matter expertise and guidance to executive management and other stakeholders. Collaborate with cross-functional teams to resolve complex technical issues, ensuring minimal disruption to business operations. Liaise with various vendors and suppliers to optimize existing Network Services. Provide technological vision and strategy for Network transformation, leading architecture discussions to address risk, security, capacity, and performance concerns. Maintain vulnerability management processes and policies using a risk-based priority methodology. Identify and implement opportunities for process automation and improvement. Aid with change management processes, including impact analysis, risk assessment, change plan, test plan, monitoring, and user communications. The Impact You Will Have: Drive significant productivity, robustness, agility, and time-to-market advantage in the creation of Synopsys products and solutions. Lead corporate infrastructure transformation, enhancing IT operations leadership. Improve and optimize Network Services, contributing to the overall efficiency and performance of the enterprise network. Enhance security measures and risk management, safeguarding the organization s critical assets. Facilitate seamless collaboration across teams, ensuring timely resolution of technical issues. Contribute to the continuous improvement of network services and user experience. What You'll Need: Demonstrated experience with risk assessments and vulnerability assessments, using tools like Qualys, Rapid7, Tenable, Wiz, etc. Expertise in Enterprise Network Architecture Designs and Security Implementations. Knowledge of Internet/DMZ/Internal Firewalls, Identity Access Management (IAM), Risk Management, Security Information Event Management (SIEM), and Web Proxy Services. Hands-on experience with network security areas such as NGFWs, IDS/IPS, SSE/SASE, SWG, ZTNA. Management and patching experience with DataCenter network technologies (e.g., Cisco ACI, Whitebox Switching with SONiC OS, BeyondEdge orchestrator, Cisco Nexus Platforms). Administration of campus infrastructure: Cisco Catalyst and Aruba OS Switching, Aruba Wireless Controllers, APs, Versa Networks SD-WAN appliances. Understanding of cloud architectures (AWS, Azure, GCP, IBM Cloud) and cloud connectivity solutions. Strong knowledge of routing protocols and failover scenarios, including BGP and OSPF. Network device configuration and infrastructure automation skills using tools such as Python and Ansible.

What You ll Be Doing: * Serving as the single point of contact for post-silicon debug activities. * Enabling Product Requirement Documents (PRDs). * Working to enable IP as a product development platform. * Handling hands-on post-silicon test setups. * Collaborating on top-level physical design, board-level, and package-level designs. * Developing post-silicon reports and conducting debug analysis. The Impact You Will Have: * Driving the successful development and deployment of PVT IP sensors. * Enhancing the reliability and performance of Synopsys silicon lifecycle monitoring solutions. * Ensuring high-quality product development through meticulous testing and debugging. * Contributing to the continuous innovation in chip design and software security. * Supporting Synopsys leadership in the market for PVT IP developments. * Empowering the creation ofhigh-performance silicon chips used in various advanced technologies. What You ll Need: * Hands-on experience in post-silicon test setups. * Sound knowledge of Digital/AMS chip design and post-silicon debug. * BS or MS degree in Electrical Engineering with 3+ years of experience. * Understanding of top-level physical design, board-level, and package-level designs. * Expertise in RTL development and physical design. Who You Are: * Strong communicator with excellent teamwork and interpersonal skills. *Detail-oriented with a mindset geared towards IP debug anddocumentation. * Proactive learner with the ability to adapt to new IPfunctionalities. * Effective leader with strong people management skills. * Highly motivated and capable of mentoring both internal teams and external customers.

Providing technical support and expertise to global customers using Synopsys Implementation products. Engaging in specific flagship projects and providing enabling solutions in all parts of the design implementation flow. Participating in technical campaigns to drive Synopsys solution adoption through hands-on involvement. Acting as a customer advocate while interfacing with the product development team to influence product roadmap and future technologies. Contributing to technical articles in the Knowledge Base to provide self-help guidance for common customer issues. Rolling out new product methodologies by providing training and technical support to customers. The Impact You Will Have: Delivering comprehensive support and effective technical solutions to enhance customer satisfaction. Driving innovation by addressing design challenges and improving product performance based on customer feedback. Collaborating with R&D teams to advance future technologies and product features. Promoting Synopsys tools to grow market presence and adoption. Ensuring seamless EDA transitions to optimize customer outcomes. Strengthening Synopsys reputation as a leader in silicon design and verification.

What You ll Be Doing: Developing and maintaining documentation for EDA products used by chip designers and scientists. Planning, organizing, and creating user guides, reference material, and release notes for design engineering audiences. Researching and organizing initial source material into high-quality drafts, including product specifications,training materials, and engineering input. Collaborating with Applications and R&D engineers to solicit feedback and reviews. Implementing good standard writing practices to develop clear and concise technical content. Ensuring documentation is up-to-date with the latest product releases and features. The Impact You Will Have: Enhancing the usability and adoption of Synopsys products through clear and comprehensivedocumentation. Supporting the success of chip designers and scientists by providing them with the information they need to effectively use Synopsys tools. Improving customer satisfaction by addressing their requirements through well-crafteddocumentation. Contributing to the overall quality and reliability of Synopsys products by ensuring accurate and detaileddocumentation. Facilitating better communication and collaboration between engineering teams and end-users. Helping to drive continuous improvement in documentation processes and standards. What You ll Need: Bachelor s or Master s degree in Engineering or Science. 5 to 12 years of technical writing experience in a software product development company. Good knowledge of technical writing standards and processes. Ability to grasp new technology quickly. Excellent written and verbal communication skills. Experience with DITA and XML authoring tools such as Oxygen XML Author. Working knowledge of UNIX or Linux. Experience with electronic design automation (EDA) tools.

What You ll Be Doing: Execute and lead product validation of Synopsyss Formality tool by understanding requirements specifications, functional specifications, and customer use cases Lead a team of 5 or more product validation engineers Collaborate with cross-functional teams such as R&D, Product Engineering to develop, implement, and execute comprehensive validation plans based on our technical roadmap and specifications Define and manage scope, schedule, and risks associated with the validation objectives Perform in-depth customer incoming root cause analysis to understand the product weak areas and hot spots and execute proactive testing to improving product quality Use product expertise to provide technical recommendations, identify, diagnose and troubleshoot issues, and propose solutions to ensure quality and readiness of the product/solution for customer deployment Analyze product validation data to identify trends, discrepancies, and areas for improvement Prepare detailed validation reports for presenting to multi-functional teams and management The Impact You Will Have: Ensuring the quality and reliability of Synopsyss Formality product to keep standing out as a leading LEC solution in the industry Enabling timely and successful deployment of high-performance designs for our customers Contributing to the innovation and advancement of LEC and product validation technologies Strengthening collaboration and communication across R&D, Product Engineering, and Field teams What You ll Need: B.Tech or equivalent and a minimum of 8 yearsof related experience or M.Tech or equivalent and a minimum of 6 years of related experience Self-motivated individual with deep domain knowledge in Logic Equivalence Checking (LEC) including expertise in debugging and resolving LEC failures using Synopsys s Formality tool Experience and sound knowledge in design implementation including datapath optimization, CTS, UPF and DFT instrumentation Sound knowledge in HDL including SystemVerilog and VHDL Exceptional debugging skills Proficiency in software and scripting skills (Perl, Tcl, Python) Experience in cross-functional teamwork, driving projects and mentoring Who You Are: Details oriented with a focus on maintaining high standards of product quality Excellent communication, organizational, risk assessment/mitigation, and time management skills Ability to abstract up and communicate meaningful conclusions and define next steps Excellent communication and leadership skills

Skills/Experience: Experience in Analog Mixed-signal DDR/HBM IP layout and verification of high-speed digital layout and solid understanding of high speed signal Experience in managing the technical aspects of project execution, ensuring timely delivery maintaining high quality standards, Advanced understanding of Deep submicron effects and mitigation, Advanced tool usage, Advanced floorplanning techniques, understand digital flow, Advanced strategies, Solid understanding of CMOS and FinFET layouts and process technology in 28nm and smaller, Good understanding of ESD and latchup layout design considerations, Familiarity with ASIC physical design flow: LEF generation, Place & Route & understanding of top level verification flow, DRC/LVS, LPE, Good understanding of IO frame and pitch requirements, power rail routings, IO abutment rules and requirements, bondpad layout, EM and IR considerations, DFM, etc Scripting skills for layout automation is a plus Remote site interaction, layout co-ordination activities, ability to foster accountability and ownership through hands-on technical leadership, Excellent written and verbal communication skills in interactions with customers, and internal development teams, Responsibilities: High Speed DDR/HBM Layout design Lead the layout design, development and implement technical solutions, Provide subject matter expertise & technical leadership in High Speed design such as DDR/HBM, Work with DDR PHY team, package engineers and system engineers to meet design specs, Perform scheduling duties, Remote site interaction etc Work with local team to support critical layout and floorplanning requirements Coordination duties with other layout teams both in Bangalore and globally, to detail out layout activities and obtain layout deliverables This includes reviewing and quality checking from remote Layout teams, Strict flow adherence and policing of internal policies to secure schedules,

What You ll Be Doing: Manage the handoff of test chips from design to tapeout and post-silicon activities. Develop, maintain, and follow up on SOW/MRD/PRD for projects before execution. Generate silicon reports and schedules for multiple project nodes and processes. Coordinate with cross-functional teams, including design, verification, and manufacturing. Collaborate with design teams to plan and coordinate test chip development (TRD documentation). Ensure automotive projects are IP9000, FUSA compliant and reported. Develop and manage project plans, including scope, schedule, and resource allocation. Lead and direct cross-functional teams to ensure project deliverables are met. Identify, assess, and mitigate project risks to ensure project success. Communicate project status, progress, and issues to stakeholders, including customers, management, and team members. Ensure project deliverables meet quality standards and customer requirements. Lead and manage project team members, including engineers, technicians, and other support staff. Identify areas for process improvement and implement changes to improve project efficiency and effectiveness. Provide regular project status reports to management and stakeholders. Experience with Agile project management methodologies. Familiarity with VLSI engineering tools and terminology, such as CAD, Layout, Digital Design, PDBE. Interact with our application engineers and provide guidance. Participate in the generation of data books, application notes, and white papers. The Impact You Will Have: Enhance the efficiency and quality of test chip silicon handoff processes. Ensure timely and successful delivery of project milestones. Improve cross-functional team collaboration and communication. Contribute to the development of high-performance silicon chips and software content. Strengthen and develop forecasting capabilities for better project planning. Ensure that automotive projects comply with industry standards and regulations. Drive continuous process improvements to enhance project efficiency. Provide valuable insights and reports to management and stakeholders. Lead and mentor project team members to achieve their full potential. Foster a culture of quality and excellence within the engineering teams. What You ll Need: Bachelor s/Master s degree in Electrical Engineering, Computer Science, or related field. Minimum 5 to 10 years of experience in project management, preferably in the technology industry. PMP certification or equivalent. Strong project management skills, including planning, organizing, and controlling. Excellent communication and leadership skills. Ability to work in a fast-paced environment and adapt to changing priorities. Strong analytical and problem-solving skills. Experience with project management tools. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV).

Designing and developing high-performance flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells, clock cells, and other complex circuits. Creating and refining environments for post-layout netlist extraction. Applying your expertise in CMOS device characteristics, design rules, latch-up, and electromigration to ensure robust designs. Optimizing digital circuits for better performance, power, and area (PPA). Performing statistical and variation analysis to enhance the reliability of designs. Collaborating with cross-functional teams to integrate designs into larger systems. The Impact You Will Have: Contributing to the creation of cutting-edge semiconductor technologies that power a wide range of applications. Enhancing the performance and efficiency of standard cell circuits, impacting the overall quality of our products. Driving innovation in power optimization and clock cell design, leading to more energy-efficient solutions. Improving the reliability and robustness of our designs through meticulous analysis and optimization. Collaborating on projects that shape the future of technology and influence industry standards. Leveraging your skills to solve complex engineering challenges, contributing to the success of Synopsys. What You ll Need: Experience in Standard Cell Circuit design of high-performance flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells, and clock cells. Strong knowledge and hands-on experience in developing environments and extracting post-layout netlists. Good understanding of CMOS device characteristics, design rules, latch-up, and electromigration. Proficiency in digital circuit design and optimization for better PPA. Hands-on experience in statistical/variation analysis

Responsibilities: - Manage and mentor a team of 8-10 senior analog designers focused on high-speed SerDes IP development across multiple projects - Define architecture specifications and circuit implementation requirements for next-generation SerDes PHY IPs - Ensure adherence to project schedules, quality metrics, power/area targets through effective team oversight - Collaborate with cross-functional teams (digital design, physical design, CAD) to integrate analog IP components - Partner with process engineering teams to enable robust analog IP across advanced FinFET nodes - Continuously drive design methodology improvements and adoption of latest EDA tools/flows - Develop and manage operational plan, including staffing, budgets and resource allocation - Hire, develop and retain top analog engineering talent through active mentorship Requirements: - Bachelors degree in electrical engineering; advanced degree preferred -8+ years of experience in analog/mixed-signal IC design with a strong background in SerDes architectures - 2+ years of people management experience leading high-performance analog design teams - Proven expertise in high-speed I/O design, architectures, circuits, and layout implementation - Extensive knowledge of CDR, DFE, CTLE, EQ, decision feedback equalizer design techniques - Hands-on experience with analog/mixed-signal design flows, tools (Cadence, Synopsys), modeling - Understanding of FinFET transistor characteristics and design challenges at advanced nodes - Strong project management skills with the ability to manage multiple priorities - Excellent communication and people leadership abilities to motivate cross-functional teams

Managing a team of software engineers to develop and optimize test vectors for VLSI chip testing. Coordinating with multiple teams to ensure seamless integration and functionality of software solutions. Programming in C/C++ to develop high-quality software for detecting manufacturing defects in VLSI chips. Conducting rigorous testing to ensure the reliability and performance of software solutions. Learning from existing documentation and source code to integrate new ideas and improve algorithms. Engaging in continuous improvement of software quality and performance. The Impact You Will Have:Enhancing the reliability and performance of VLSI chips used in advanced technologies like AI and automated cars. Ensuring the highest quality of integrated circuits delivered to major design houses. Driving innovation in chip design and validation through optimized software solutions. Contributing to the success of Synopsys cutting-edge technology in the semiconductor industry. Improving the efficiency and effectiveness of software development processes. Fostering a collaborative and high-performing engineering team. What You will Need: Proficiency in programming, preferably in C/C++. Experience in managing and leading small teams of software engineers. Strong knowledge of data structures and algorithms. Good understanding of digital logic and VLSI concepts. In-depth understanding of timing analysis in VLSI.

Work closely with the verification team and review verification plan mapping with the specification, Work with product teams to evaluate customer requirements related to quality, functional safety, and automotive reliability, Work closely with the Functional Safety and internal development teams on projects and task planning, progress tracking and reporting, Key Qualifications Must have BSEE in EE with 5+ years of relevant experience or MSEE with 4+ years of relevant experience, Must have proven experience working on Automotive SoCs / Digital IPs, Must have proven experience working of one or more of protocols at the IP level: DDR / PCIe / UCIe, Hands on experience with architecting / micro-architecture / detailed design from functional specifications, Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools, Lint, CDC, synthesis flow and static timing flows, formal checking, etc experience, Working knowledge / experience TCL, Perl, Python is added advantage, Has a solid desire to learn and explore new technologies, Performs in project leadership role & guides more junior peers with aspects of their job, Frequently networks with senior internal and external personnel in own area of expertise, Proficient in English, Formal training in ISO 26262 is preferred, Experience in qualifying systems with embedded hardware to various ISO 26262 ASIL levels up to ASIL D Experience with various ISO 26262 work products such as DFMEA; FMEDA; DFA Inclusion and Diversity are important to us Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability,

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a highly skilled and experienced Analog Design Engineer with a passion for developing cutting-edge technology With a strong foundation in Electrical or Computer Engineering, you have honed your expertise in transistor-level circuit design and are adept at working with high-speed analog integrated circuits Your deep understanding of CMOS design fundamentals and familiarity with various SerDes sub-circuits make you an invaluable asset to any team You thrive in collaborative environments, working seamlessly with cross-functional teams of analog and digital designers Your meticulous approach ensures optimal power, area, and performance targets are met, and your innovative design strategies push the boundaries of what is possible You are not only technically proficient but also possess excellent communication and documentation skills, allowing you to effectively share your ideas and results with peers and customers Your proactive attitude and problem-solving abilities make you a go-to person for post-silicon design updates and electrical characterization In summary, you are a seasoned professional ready to take on the challenges of high-speed analog integrated circuit design in the latest FinFET process nodes, What Youll Be Doing: Review SerDes standards to develop analog sub-block specifications, Identify and refine circuit architectures to achieve optimal power, area, and performance targets, Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design, Oversee physical layout to minimize the effect of parasitics, device stress, and process variation, Present simulation data for peer and customer review, Document design features and test plans, Consult on the electrical characterization of your circuit within the SerDes IP product, Propose solutions for post-silicon design updates, The Impact You Will Have: Drive innovation in high-speed analog integrated circuit design, Ensure optimal performance, power efficiency, and area utilization of our products, Contribute to the development of industry-leading SerDes IP, Enhance the reliability and quality of our analog sub-blocks, Support the successful integration of SerDes IP into customer products, Foster collaboration and knowledge sharing within the R&D team, Influence design strategies and best practices within the organization, What Youll Need: BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering, In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals, Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits, Awareness of ESD issues and circuit techniques for addressing them, Familiarity with custom digital design and high-speed logic paths, Knowledge of design for reliability, including EM, IR, and aging considerations, Experience with tools for schematic entry, physical layout, and design verification, Hands-on experience with physical layout of high-speed circuits is a plus, Proficiency with SPICE simulators and simulation methods, Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture, Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired, Who You Are: Collaborative and able to work effectively in a team environment, Detail-oriented with a strong focus on quality and reliability, Proactive problem-solver with innovative design strategies, Excellent communicator with strong documentation skills, Adaptable and able to thrive in a fast-paced, dynamic environment, The Team Youll Be A Part Of: You will be part of a fast-growing analog and mixed-signal R&D team dedicated to developing high-speed analog integrated circuits in the latest FinFET process nodes Our team is composed of talented analog and digital designers from diverse backgrounds, working collaboratively to push the boundaries of technology We leverage a full suite of IC design tools, supplemented by custom, in-house tools supported by an experienced software/CAD team, to create industry-leading SerDes IP, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

What You ll Be Doing: Designing, developing, troubleshooting, and maintaining software programs for std. cells development automations Involving in all phases of software development, including project planning, problem identification, design specification, development, testing, and product support Exercising judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results Developing state-of-the-art solutions through technical contributions that lead to significant product differentiation Designing and implementing sophisticated algorithms to solve complex problems Collaborating with cross-functional teams to ensure seamless integration and delivery of software solutions The Impact You Will Have: Driving innovation in software solutions for std. cells development automations Enhancing the efficiency and effectiveness of our software development lifecycle Contributing to the development of cutting-edge technology that sets Synopsys apart in the industry Ensuring high-quality software delivery through rigorous testing and problem-solving Influencing the design and implementation of future software projects Supporting the continuous improvement of our software development processes What You ll Need: Proficiency in Python or C/C++ Knowledge of algorithms and data structures Working experience on UNIX/Linux and Windows OS Knowledge in OOP programming Strong desire to learn and explore new technologies Ability to demonstrate good analysis and problem-solving skills Prior knowledge and experience of EDA tools and schematic/layout design Excellent English language communication skills Ability to compile functional and design specifications

ApplicationEngineering :StaffEngineer,you will be Working on latest Synopsys implementation technologies( MachineLearning ,Synthesis, PhysicalSynthesis ,Multi Source CTSetc )to solve complex PPA challenges faced by Synopsys customers Working on benchmarks to displace competition implementation solutions Working on developing and debugging RTL-GDS implementation methodologies and flows by collaborating with key stake holders Providing technical solutions by identifying the design and/or EDA tool issues and provide appropriate solution for customers Effectively translate the findings into requirements for R&D to improve both tool behaviour with enhancements as adaptive long-term solutions. Involved in deployment of new technologies on latest EDA versions and enable customers to migrate to newer versions achieving best PPA Coming up with proactive understanding of customers pain point and come up with innovative solutions to address the same. Closely interacting with Synopsys R&D team and product development team to develop future technologies This role requires you to act as customers advocate while talking to inhouse R&D, andbe a product brand ambassador while engaging with customers. Requirements At-least 5+ years of experience in Physical Implementation RTL-GDS. Experience in independently debugging and resolving Synth &PnRimplementation challenges. Ability to handle complete project independently through timely successful outcome.. Candidate must have good exposure towards methodology changes to achieve targeted PPA metrics for complex designs. Proficiency in Synopsys implementation tools is an advantage The individual must be self-motivated and dedicated with strong debug skills Requires proficiency in scripting (tcl/unix/perl) Excellent communication skills including ability to interface with customers and business unit personnel are essential.