STA/STD Cell characterization

3 - 7 years

3 - 8 Lacs

Posted:3 weeks ago| Platform: Naukri logo

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Full Time

Job Description

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Job Description
As a Verification Engineer at HBM Micron Technology, Inc., you will be responsible for analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design team and verification team Responsibilities will include, but are not limited to: • Doing STD cells characterization work (max up to 40% of time) , Static timing analysis (60%) • Able to characterize basic STD Cells • Writing ARC for STD cell char (using primeLib , Silicon smart) • .lib QA check • Circuit understanding block wise , Full chip level • Static timing Analysis of DRAM block wise , top level analysis , cell level analysis • Writing constraints , analyzing the STA reports • Reporting violations to Design team , ownership for closure • Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions • Performing verification processes with modeling and simulation using industry standard simulators • Contributing to cross group communication to work towards standardization and group success • Driving innovation into the future Memory generations within a dynamic work environment

Desired experience 3-5 Years

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Acesoft Labs

IT Services and IT Consulting

Bangalore Karnataka

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