Posted:2 hours ago|
Platform:
Work from Office
Full Time
Your Team, Your Impact
Data Center Engineering Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. This group provides technology development, EDA/methodology development and IP/Chip design development. India DFT team is a key part of Global DFT community with global ownership and responsibility for delivering generic and more advanced custom DFT architecture solutions, methodology and design. You will be working with this team to directly enable customer DFT requirements for Custom and Compute Businesses.
What You Can Expect
The position will be responsible for understanding , planning and providing MBIST solutions for complex Custom/Compute ASIC/SoC designs, including post silicon
The responsibility also includes collaboration with DFT architects, memory teams and cross domain collaboration to resolve any MBIST related challenges.
In this position, the responsibility also includes exploring new features and solutions for MBIST test time reduction, faster and more efficient debug and diagnostics
The position also involves participating in post silicon MBIST debug and diagnostics for cutting edge technologies
What Were Looking For
Bachelor s/ Masters degree in Computer Science, Electrical Engineering or related fields and 8 to 12 years of related professional experience.
Hands-on working experience in Memory BIST (MBIST) and memory repair insertion, pattern generation, debug and diagnosis, pre and post silicon.
Should have hands on with MBIST simulations, zero wire load and timing aware
Strong fundamentals in Digital Circuit Design and Logic Design is required
Understanding and experience with End-to-end DFT flow is a plus
Scripting skills using PERL, Tcl and C-Shell is plus
Marvell Semiconductors
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