Staff Engineer, ASIC Development Engineering

Are you ready to push the boundaries of whats possible in technology? Join the trailblazers at Sandisk, as an ASIC RTL Design Engineer, you will be at the forefront of designing high-performance ASICs. By leveraging your expertise in RTL design and modern tools like GitHub Copilot, you will enhance the design process and productivity. You will collaborate with cross-functional teams to deliver groundbreaking solutions that meet our high standards of quality and performance

Key Responsibilities:

• Innovate and develop RTL code for complex ASICs.
• Contribute in SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers.
• Ensure robust design methodologies including

  Lint, CDC, RDC, CLP and FC-Elab

  .
• Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process.
• Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
• Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution.
• Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design.

Qualifications

Qualifications

• Bachelor s or master s degree in electrical engineering, Computer Engineering, or a related field with 5-8 years of experience.
• Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog.
• Strong understanding of SoC architecture, AMBA protocols (

  AXI/AHB/APB

  ), interconnects and peripherals for debug.
• Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must.
• Proficiency in scripting languages (e.g., Python, TCL) for automation.

• Hands-on with EDA tools

  (simulation, lint, CDC, synthesis, formal verification).
• Strong problem-solving skills and the ability to thrive in a dynamic environment.
• Excellent communication and teamwork abilities.

Preferred Qualifications:

• Experience in low-power design techniques and methodologies.
• Prior knowledge with storage ASICs is a plus.
• Familiarity with high-speed interfaces (e.g., USB, SD Express, Compact Flash, PCIe, DDR).
• Familiarity in leveraging AI tools, including GitHub Copilot, for design and development.