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Sr. Staff ASIC Verification Engineer

Sr. Staff ASIC Verification Engineer

8 - 9 years

|

4 - 8 Lacs

Pune, Maharashtra, India

Posted:2 weeks ago| Platform: Foundit logo

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Skills Required

VHDL Uvm

Work Mode

On-site

Job Type

Full Time

Job Description

Key Qualifications Proven desire to learn and explore new state of the art technologies Demonstrate good written and spoken English communication skills Demonstrate good review and problem-solving skills Knowledgeable with Verilog, VHDL and/or SystemVerilog Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus Understanding of verification methodology such as UVM . Good organization and communication skills Be a solution provider. 8+ years of relevant experience

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Synopsys

www.synopsys.com

Software Development

Sunnyvale California

10001 Employees

617 Jobs

Key People

Aart de Geus

Co-CEO and Chairman
Chi-Foon Chan

Co-CEO and President
Sanjay Balakrishnan

Chief Financial Officer

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