Silicon Design Engineer

As a STA Synthesis Engineer at AMD, you play a crucial role in planning and executing the front-end implementation of IPs and ensuring their closure. Your responsibilities include ownership of synthesis, LEC, CLP, prelayout STA, and postlayout STA/Timing closure. You will collaborate with the design team and PNR teams, guiding team members on technical issues. Key Responsibilities: - Responsible for front-end implementation of IPs, including synthesis, LEC, CLP, prelayout STA, and postlayout STA/Timing closure - Collaborate with designers and PNR teams to achieve closure - Plan and execute tasks as per schedule, ensuring quality delivery for synthesis and timing closure - Debug and resolve technical issues effectively Preferred Experience: - Highly experienced in synthesis, LEC, CLP, and timing closure - Preferably have top-level or SOC level experience - Proficient in handling blocks with complex designs, high-frequency clocks, and complex clocking - Thorough understanding of timing constraints, low-power aspects, and DFT concepts - Ability to debug and resolve issues, with proficiency in scripting and automation Academic Credentials: - Bachelors with 8 years of experience or Masters degree with 6 years of experience in Electrical Engineering At AMD, our mission is to build innovative products that drive next-generation computing experiences across various domains. Grounded in a culture of innovation and collaboration, we believe in pushing the limits of innovation to solve the world's most important challenges. If you are passionate about shaping the future of AI and beyond, join us at AMD and be part of a culture that values bold ideas, execution excellence, and diversity of perspectives.,