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Senior Staff Design Engineer

Senior Staff Design Engineer

Infineon

7 - 12 years

9 - 17 Lacs

Bengaluru Karnataka India

Posted:1 week ago| Platform: Foundit logo

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Skills Required

ASIC ASIC design UPF MVRC

Work Mode

On-site

Job Type

Full Time

Job Description

Candidate will be responsible for building/maintaining highly configurable and reusable IO Subsystems (Note: An IO Subsystem is a logic IP that processes the IO Pads/IO Ring information and required logic to allow multiple on-chip peripherals to share the same IOs in a configurable manner)
Candidate will be responsible for
RTL design
for integration of
IO pads into SoC
, building the required multiplexing logic and necessary power control signals integration.
Strong fundamentals in DFT/Fault-grading and/or hands on experience.
Significant Technical Contribution in to Logic
IP/SoC Design
&Architectural activities.
Sound & Practical Written and Verbal Communication Skills.

Your Profile

You are best equipped for this task if you have:

Must have worked in ASIC Design flow, with ASIC experience of 7 to 12years.
Must be strong in scripting using Perl/Python
Must be familiar with RTL design for ASIC development using Verilog.
Must be familiar with
LINT (LEDA/Spyglass),Clock-Domain
-Crossing analysis, UPF, MVRC, Synthesis, Timing constraints and debugging S
TAreports.
Strong mindset towards automation of repetitive work.
Strong fundamentals in
DFT/Fault
-grading and/or hands on experience.
Significant Technical Contribution into
Logic IP/SoC
Design &Architectural activities.
Sound & Practical Written and Verbal Communication Skills.
Moderate Individual Contributor with Freedom to Act, Team work and Learn

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Infineon

Semiconductors

Neubiberg

46,700 Employees

122 Jobs

Key People

Dr. Reinhard Ploss

CEO
Dr. Sabine Best

Chief Financial Officer
Peter Seimer

Chief Technical Officer

Bengaluru, Karnataka, India

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Senior Staff Design Engineer