Senior Engineer Digital Design Infineon Technologies

0.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Candidate will be responsible for building/maintaining highlyconfigurable and reusable IO Subsystems (Note: An IO Subsystem is alogic IP that processes the IO Pads/IO Ring information and requiredlogic to allow multiple on-chip peripherals to share the same IOs in aconfigurable manner) Job Description In your new role you will: Candidate will be responsible for building/maintaining highly configurable and reusable IO Subsystems (Note: An IO Subsystem is a logic IP that processes the IO Pads/IO Ring information and required logic to allow multiple on-chip peripherals to share the same IOs in a configurable manner) Candidate will be responsible for RTL design for integration of IO pads into So...

Posted 4 days ago

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SOC Power design -Lead Qualcomm

1.0 - 12.0 years

0 Lacs

karnataka

On-site

Qualcomm India Private Limited is seeking an experienced professional to join their Engineering Group in the Hardware Engineering area. In this role, you will collaborate with cross-functional teams to work on System on Chip (SoC) Power and architecture for mobile SoC Application-Specific Integrated Circuits (ASICs). To be successful in this position, you should have a minimum of 4-12 years of experience in the following key areas: - Familiarity with low power intent concepts and languages such as UPF or CPF - Proficiency in power estimation and reduction tools like PowerArtist/PTPX and Calypto - Understanding of power dissipation and power savings techniques, including dynamic clock and vol...

Posted 1 month ago

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Senior Staff Design Engineer Infineon

7.0 - 12.0 years

9 - 17 Lacs

Bengaluru, Karnataka, India

On-site

Candidate will be responsible for building/maintaining highly configurable and reusable IO Subsystems (Note: An IO Subsystem is a logic IP that processes the IO Pads/IO Ring information and required logic to allow multiple on-chip peripherals to share the same IOs in a configurable manner) Candidate will be responsible for RTL design for integration of IO pads into SoC , building the required multiplexing logic and necessary power control signals integration. Strong fundamentals in DFT/Fault-grading and/or hands on experience. Significant Technical Contribution in to Logic IP/SoC Design &Architectural activities. Sound & Practical Written and Verbal Communication Skills. Your Profile You are...

Posted 3 months ago

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