Senior RTL Design Engineer

Job Description

Role & responsibilities "You will be closely working with Architecture Team, SOC Design Team, Product Design, Software Teams; Understand the requirement, enhancements required etc; create a realistic schedule and resource plan You will completely own the IP Design; preparing the micro-architecture, detailed design document, implement design using RTL coding techniques, performing reviews and ensuring all quality criteria are met Work with verification team on reviewing the verification test plan to ensure design features are verified correctly, issue debug, coverage analysis etc Provide support to SOC Integration, Physical Design, Software, Product Engineering team on pre & post silicon activities on need basis" Preferred candidate profile - Min 7 years full time experience in IP design, Detailed understanding of SOC Design - Good understanding and Hands on experience in interconnect designs, multi-clock designs, SoC BUS architecture and NOC concept; - Experience in performance and latency tuning will be an add-on - Proficiency in IP Design using Verilog, System Verilog hardware logic design language - Sound knowledge of AMBA protocols like APB/AHB/AXI/ACE/ACE-Lite -Self-driven, Strong problem solving, root causing and debugging skill -Experience in creating documents such as micro-architecture, hardware design document, verification request etc -Work collaboratively with other members of the IP Team, SOC Team, cross-functional teams across various geographies - Good written and verbal communication skills