Senior Analog Layout Engineer

Greetings from Eximietas Design! We are actively seeking Senior Analog Layout Design Engineers / Leads with a minimum of 5-12 years of experience in the field, preferably with expertise in TSMC 5nm or TSMC 7nm technology nodes. Join our dynamic team at locations in Bengaluru, Vizag, or Hyderabad. As a Senior Analog Layout Design Engineer, you will be responsible for contributing to cutting-edge analog layout design, focusing on aspects such as IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Your role will involve implementing layouts that adhere to strict design constraints while ensuring high quality and optimal circuit performance. Key Skills & Requirements: - Proficiency in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. - Strong comprehension of how layout impacts circuit performance metrics such as speed and area. - Ability to create layouts that meet rigorous design constraints and uphold quality standards. - Hands-on experience with CADENCE/SYNOPSYS layout tools and workflows. - Familiarity with scripting languages such as PERL/SKILL is considered a plus. - Excellent communication skills with a proven track record of collaborating effectively with cross-functional teams. If this opportunity aligns with your expertise and interests, or if you know someone who would be a suitable fit, please forward your updated resume to maruthiprasad.e@eximietas.design. Referrals are highly appreciated. We are excited to connect with talented engineers who are passionate about pushing the boundaries of analog layout design! Best regards, Maruthhi Naidu Talent Associate - VLSI Manager Eximietas Design - Visakhapatnam Email: maruthiprasad.e@eximietas.design Phone: +91 8088969910,