R&D Engineering, Staff Engineer - IP Verification

3.0 - 5.0 years

3.0 - 7.0 Lacs P.A.

Bengaluru / Bangalore, Karnataka, India

Posted:1 week ago| Platform: Foundit logo

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Skills Required

UvmsystemverilogVerification IP modelingTestbench developmentProtocol knowledge (PCIeDDR)Functional coverage analysis

Work Mode

On-site

Job Type

Full Time

Job Description

Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol

Synopsys
Synopsys

Software Development

Sunnyvale California

10001 Employees

455 Jobs

    Key People

  • Aart de Geus

    Co-CEO and Chairman
  • Chi-Foon Chan

    Co-CEO and President

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