47 Physical Implementation Jobs

About Eridu AI Eridu AI India Private Limited, a wholly owned subsidiary of Eridu Corporation, Saratoga, California, USA, is looking to hire highly motivated and talented professionals for its R&D center in Bengaluru to join our world-class team. Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today's AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company's solution...

Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part team developing Subsystems & SoCs. You will work with Architects to capture the requirements and develop Micro-architecture specifications for one or more SOC areas such as Power Management, Boot, Debug, Clocks, Resets, DDR, RAS, Security, Access Control, Die to Die etc. Key responsibilities will include writing micro-architecture and work with Design team to deliver high quality RTL. Collaborate with verification and Validation team to review test plans, and help debug design issues. Closely work with the Power and Performance analysis team to evaluate and improve Subsystem/SOC PPA. Contr...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems for cutting-edge products. You will collaborate with cross-functional teams to meet performance requirements. Your responsibilities will include: - Plan, design, optimize, verify, and test electronic systems - Bring-up yield, circuits, mechanical systems, and various digital/analog/RF/optical systems - Develop test systems, FPGA, and/or DSP systems for launching world-class products Qualifications required for this role include: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 2+ ...

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge products. Working closely with cross-functional teams, you will be involved in developing solutions to meet performance requirements. Key Responsibilities: - Possessing 5 to 10 years of experience in static timing analysis, constraints, and other physical implementation aspects - Demonstrating proficiency in industry standard tools such as PT, Tempus, GENUS, Innovus, ICC, etc....

Job Description: You will be responsible for leading product execution for Automotive/Consumer/Industrial ASIL-B/D SoCs. This includes working with architects and systems engineering to define the part, generating and analyzing data to make architecture decisions, and collaborating with IP, Technology, and packaging partners to assess the right options. Additionally, you will work with various SoC functions to resolve inter/intra functional handoff challenges, oversee definition management, and ensure implementation compliance with requirements. It is important to closely work with downstream teams, Test and Product engineering teams, and post-silicon evaluation teams to address design issue...

Job Description If you are passionate about pushing the boundaries of Design technology and thrive in a collaborative, dynamic environment, we invite you to join our team as a Design Engineer. Join us to be part of our journey in shaping the future of SoC design and innovation. Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for SoCs. You will work with the project team to understand and review the architecture a nd develop the design specifications. Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design ch...

MPU Engineering team defines and develops System on Chip, ASIC's, Digital and Analog IP's for a wide range of products, including automotive microprocessors, application processors, microcontrollers, and network processor. Responsibilities:- Lead product execution for Automotive/Consumer/Industrial ASIL-B/D SoC's Work with architects and systems engineering to define the part. Generate and analyze data to take right and cost-effective architecture decision. Work with IP, Technology, packaging partners to assess the right IP/packages and technology options for the part. Work with IP and SoC functions (front end, verification, AMS, DFT, Physical implementation) to understand and resolve inter/...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will play a crucial role in designing cutting-edge solutions that are futuristic and impactful. Your expertise in ASIC RTL Design and proficiency in Verilog/System Verilog will be key assets in this role. You will have the opportunity to work with multiple clock and power domains, integrating and validating various MIPI cores such as CSI/DSI/DPHY/CPHY/other MIPI cores. Your responsibilities will include debug tasks related to CSI/DSI, RTL design and implementation of CSI/DSI controllers, and creating block-level micro-architecture specifications. Key Responsibilities: - Utilize your 10+ years of ASIC RTL Design experience to creat...

You are seeking a talented and motivated individual to join the team at ASM Auto to work on developing cutting-edge solutions with Application-Specific Microcontrollers (MCUs) for the automotive industry. The MCUs power various vehicle functions and contribute to shaping the future of automotive technology. **Key Responsibilities:** - Define and develop microarchitecture for CPU subsystems, low-power subsystems, and Reset & Clock Management modules. - Drive SoC integration for automotive MCUs to ensure efficient and scalable designs. - Collaborate with IP teams, Systems, and Architecture teams to derive requirements and co-develop microarchitecture for IPs, subsystems, and SoC. - Work closel...

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, and more to launch cutting-edge products. You will collaborate with cross-functional teams to meet performance requirements and develop innovative solutions. **Key Responsibilities:** - 3 to 5 years of experience in static timing analysis, constraints, and other physical implementation aspects - Strong grip on STA fixing aspects for solving critical timing and clock path analysis - Experience in preparing complex ECOs for timing convergence across a wide range...

You will work as a Qualcomm Hardware Engineer at Qualcomm India Private Limited, where you will play a key role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems to develop cutting-edge products. You will collaborate with cross-functional teams to meet performance requirements and drive innovation in the field of Hardware Engineering. **Key Responsibilities:** - Plan, design, optimize, verify, and test electronic systems - Work on circuits, mechanical systems, and various types of systems like Digital/Analog/RF/opti...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

Role Overview: As a Senior RTL Design Lead at Synopsys, you will play a crucial role in leading complex ASIC digital subsystems from concept to silicon. You will be responsible for crafting subsystem architectures, developing functional specifications, implementing micro-architectures, and ensuring compliance with best RTL coding practices. Your expertise in industry-standard protocols such as PCIe, DDR, UFS, USB, and AMBA will be essential in integrating them within subsystem designs. Additionally, you will mentor junior engineers, participate in technical reviews, and drive innovation within the team. Key Responsibilities: - Lead the complete subsystem lifecycle, from requirements gatherin...

Alternate Job Titles: Senior RTL Design Lead We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and accomplished RTL design expert with a proven track record in leading complex ASIC digital subsystems from concept to silicon. Thriving on technical challenges, you find deep satisfaction in delivering first-time...

As a Senior Silicon Design Engineer at AMD, you play a crucial role in driving and improving the ability to deliver high-quality, industry-leading technologies to the market. Your contributions are instrumental in showcasing successes and facilitating continuous career development. We are seeking an adaptive and self-motivated individual to join our dynamic team. - Demonstrate a deep passion for modern, complex processor architecture, digital design, and verification. - Possess excellent communication skills and experience collaborating with engineers from different locations and time zones. - Utilize strong analytical and problem-solving skills to tackle challenges head-on. Key responsibili...

Alternate Job Titles: Principal Memory Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished and innovative engineer passionate about pushing the boundaries of embedded memory design. With a strong foundation in electrical and electronics engineering, you thrive in dynamic environments where co...

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

Role Overview: You will be responsible for ASIC RTL design with 10+ years of experience and proficiency in Verilog/System Verilog. Your role will involve working with multiple clock and power domains, integrating and validating various MIPI cores, debugging, and implementing CSI/DSI controllers. Additionally, you will be creating micro-architecture specifications, reviewing vendor IP integration guidelines, running integrity check tools, and participating in design verification and physical implementation processes. Key Responsibilities: - Possess 10+ years of ASIC RTL Design experience and proficiency in Verilog/System Verilog - Work with multiple clock and power domains - Integrate and val...

As a Qualcomm Hardware Engineer, your role involves planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. Key Responsibilities: - Utilize your 3 to 5 years of experience in static timing analysis, constraints, and other physical implementation aspects - Demonstrate a solid understanding of industry standard tools such as PT, Tempus, and familia...