Physical Design Lead

We are seeking a highly motivated Physical Design Lead with strong leadership, interpersonal, and mentoring skills. The candidate will lead a team of engineers, drive block-level physical design activities, and ensure delivery of high-quality, low-power designs in advanced technology nodes.

Key Responsibilities

• Good exposure in handling complete block-level RTL-to-GDSII implementation flow.
• Capable of handling block-level timing closure.
• Excellent knowledge on all low-power & signoff checks, like MVRC/CLP, LEC/Formality, DRC, LVS, IR, EM.
• Good scripting skills (TCL/SHELL/PERL).
• Experience with low-power implementation techniques is preferred.
• Prior experience in lower tech nodes like 10nm, 7nm, and 5nm is preferred.

Qualifications & Skills

• Bachelors degree in Electronics & Communication / Electrical & Electronics (Masters in VLSI preferred).
• 68 years of proven experience in Physical Design flow with hands-on block-level ownership.
• Strong knowledge of timing closure, low-power design, and signoff methodologies.
• Strong interpersonal, communication, and team-handling skills.
• Prior experience mentoring junior engineers and leading a design team.
• Exposure to lower technology nodes (10nm, 7nm, 5nm) is highly desirable.