Memory Layout Engineers

As an experienced "Memory Layout" Engineer with 10+ years of experience, you will be responsible for designing memory layout for blocks such as Caches, CAMs, Register files, multiport register Files, Compilers, and analog layouts like PLLs, TX, RX, amplifiers. Your role will require hands-on work, leadership abilities, and a growth mindset. Effective communication skills are essential for collaborating with cross-site designers. You should have practical experience with technologies like Finfets, GAA, and working with technology nodes below 7nm. Proficiency in debugging and resolving issues related to LVS, DRC, Antenna, DFM, EM, IR, and Methodology check is required. Additionally, you will be expected to drive collaborative initiatives with cross-functional teams, and having scripting skills in PERL, Python, SKILL, and/or TCL for automation purposes will be advantageous. Understanding the physical design flow is also a plus. Key Responsibilities: - Design memory layout for various blocks including Caches, CAMs, Register files, and analog layouts like PLLs, TX, RX, amplifiers - Demonstrate hands-on work, leadership qualities, and a growth mindset - Collaborate effectively with cross-site designers - Utilize expertise in technologies like Finfets, GAA, and work with technology nodes below 7nm - Debug and resolve issues related to LVS, DRC, Antenna, DFM, EM, IR, and Methodology check - Drive collaborative initiatives with cross-functional teams - Use scripting skills in PERL, Python, SKILL, and/or TCL for automation purposes - Understand the physical design flow for added advantage Qualifications Required: - Minimum 10 years of experience in Memory Layout design - Proficiency in designing blocks for memory layout - Strong communication skills - Experience with technologies like Finfets, GAA, and technology nodes below 7nm - Ability to debug and resolve issues related to LVS, DRC, Antenna, DFM, EM, IR, and Methodology check - Leadership abilities to drive collaborative initiatives - Scripting skills in PERL, Python, SKILL, and/or TCL for automation - Understanding of the physical design flow is an added advantage If interested, please share your updated profile with anand.arumugam@modernchipsolutions.com.,