Lead FPGA Design Engineer

As a Lead RTL Design Engineer at Astrome Technologies, you will play a crucial role in guiding the development of innovative 5G ready wireless systems. Your responsibilities will include: - Leading the definition and implementation of RTL architectures - Participating in the specification and design of complex communication systems - Overseeing and mentoring a team of engineers in the design, verification, and implementation of RTL designs using System Verilog - Conducting synthesis, implementing designs on FPGAs, and resolving timing violations - Collaborating with Software and Hardware teams to troubleshoot and optimize system performance issues - Ensuring adherence to design methodologies and best practices throughout the development process Required Skills: - 8+ years of experience in RTL design and verification, with a proven track record in leading design teams - In-depth expertise in digital design principles, RTL design, and FPGA development flows - Advanced proficiency in HDLs, particularly SystemVerilog/Verilog for RTL Design - Strong experience in designing IPs using AXI4, AXI4 Lite, and AXI4 Stream Protocols - Comprehensive understanding of Xilinx FPGA architectures and proficiency in using tools like Vivado - Solid knowledge of digital signal processing techniques, including Fast Fourier Transform, linear algebra, and complex algebra - Experience in the realization of baseband processing for wireless systems, such as OFDM - Proven ability to innovate and research unfamiliar technologies applicable to product development - Strong organizational skills with the ability to manage projects, timelines, and cross-functional communication effectively You will be part of a company that offers great career growth opportunities, ESOPs, Gratuity, PF, and Health Insurance.,