Layout Engineer

Role Overview: You will be responsible for developing custom layout design of analog blocks, complex digital, mixed signal blocks, standard cell libraries, or memory compilers. Your tasks will include performing detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf cell layout, and compiler assembly coding. Additionally, you will conduct complete layout verification, ensuring design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks. You will use custom autorouters and custom placers to efficiently construct layout. Your role will also involve providing feedback to circuit design engineers for new feature feasibility studies, implementing circuit enhancement requests, and developing new and innovative layout methods to enhance productivity and quality. You will troubleshoot a wide variety of issues, including design and tool/flow/methodology issues used for layout design. Key Responsibilities: - Develop custom layout design of analog blocks, digital and mixed signal blocks, standard cell libraries, or memory compilers - Perform detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf cell layout, and compiler assembly coding - Conduct complete layout verification including design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks - Use custom autorouters and custom placers to efficiently construct layout - Provide feedback to circuit design engineers for new feature feasibility studies and implement circuit enhancement requests - Develop and drive new and innovative layout methods to improve productivity and quality - Troubleshoot a wide variety of issues up to and including design and tool/flow/methodology issues used for layout design Qualifications: - Academic Qualification: Bachelor or Masters in EC, EE - Required skillsets: Good understanding of CMOS circuit design concepts - Exposure to Analog, Custom Layout design, and verification - Good scripting background will be considered good to have - Exposure to Cadence Virtuoso Layout Tool - good to have *Note: The Job Description does not contain any additional details about the company.,