IP Verification Engineer

As a Verification Engineer, you will be responsible for designing and developing test benches using HVLs like System Verilog, Specman, etc. Your deep expertise in Verification Methodologies such as OVM, UVM, VMM will be crucial in creating verification environments and test plans. Additionally, having domain expertise in Networking protocols, Interface protocols like PCIe, USB, SATA, or SoC Verification will be a plus. Your familiarity with scripting languages and good communication skills will enable you to excel in this role. If you have a BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE, this position is perfect for you. - Design and develop test benches using HVLs like System Verilog, Specman, etc. - Utilize expertise in Verification Methodologies like OVM, UVM, VMM to create verification environments and test plans. - Apply domain expertise in Networking protocols, Interface protocols like PCIe, USB, SATA, or SoC Verification. - Use scripting languages to enhance verification processes. - Communicate effectively and collaborate as a valuable team player. - BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE. - Deep expertise in Verification Methodologies like OVM, UVM, VMM. - Experience in creating verification environment and test plans. - Domain expertise in Networking protocols / Interface protocols like PCIe, USB, SATA, SoC Verification is a plus. - Familiarity with scripting languages. - Good communication skills with the ability and desire to work as a good team player.,