3 years
0 Lacs
Posted:1 day ago|
Platform:
On-site
Full Time
We Are Hiring!
📢Role: Design Verification Engineer
📌Experience: 3 - 8 Years
📌Location: Hyderabad
Key Responsibilities:
🔹M.Tech/B.Tech in Electronics and Communication Engineering or related field and 3+ years of relevant experience.
🔹Proficiency in Verilog, System Verilog and UVM methodology.
🔹Ability to develop VIPs.
🔹Write test plans based on the feature list.
🔹Strong understanding of Digital Design Concepts, SoC Architecture, Processor architecture.
🔹Ability to debug test failures, excellent problem solving skills.
🔹Scripting (Perl, Python) for test automation.
🔹Familiarity with Simulati on environment (Synopsys, Cadence).
🔹Knowledge on Assertion based Verification.
🔹Knowledge on SystemC modelling is a plus.
🔹Knowledge of AMBA protocols.
🔹Knowledge of the C programming language is a plus.
🔹Strong in Verilog, System Verilog, UVM, and digital design concepts.
Bonus Skills (Preferred but Not Mandatory):
🔹SystemC, PCIe/CXL/DDR/USB, and C programming.
📩 Send Your Resume: hr1@vconnectech.in
📞 9281014443
🌐 For more info visit: vconnectechsystems.com
VConnecTech Systems Private Limited
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