665 Fpga Jobs - Page 6

Networking development positions for Cisco NxOS Exablaze - 3550 Senior Development engineers or Leaders with proven Networking L2, L3 expertise with focus on Multicast, DHCP, VPC, etc Expertise in embedded C (mandatory), Cisco NX-OS, REST API / gNMI L2 - VLAN, LACP, vPC; Unicast routing - OSPF, BGP, Layer-3 virtualization; Multicast Routing Container technologies - Docker L1 - GigaEthernet - 10/25/40/100 Gbps Access Control Lists (ACL) / Quality of Service (QoS) / XML Desirable expertise includes experience in developing FPGA-based switches, Smart NIC or Merchant ASICs

Engineers with proven expertise in Networking L2, L3, Multicast, DHCP, vPC, etc protocols and features Excellent knowledge in Python coding with hands-on experience in test automation framework development and enhancements L2 - VLAN, LACP, vPC; Unicast routing - OSPF, BGP, Layer-3 virtualization; Multicast Routing Container technologies - Docker L1 - GigaEthernet - 10/25/40/100 Gbps Access Control Lists (ACL) / Quality of Service (QoS) / XML Desirable expertise includes experience in testing FPGA-based switches, Smart NIC testing, or Merchant ASICs

Engineers with proven expertise in Networking L2, L3, Multicast, DHCP, vPC, etc protocols and features Excellent knowledge in Python coding with hands-on experience in test automation framework development and enhancements L2 - VLAN, LACP, vPC; Unicast routing - OSPF, BGP, Layer-3 virtualization; Multicast Routing Container technologies - Docker L1 - GigaEthernet - 10/25/40/100 Gbps Access Control Lists (ACL) / Quality of Service (QoS) / XML Desirable expertise includes experience in testing FPGA-based switches, Smart NIC testing, or Merchant ASICs

Senior Development engineers or Leaders with proven Networking L2, L3 expertise with focus on Multicast, DHCP, VPC, etc Expertise in embedded C (mandatory), Cisco NX-OS, REST API / gNMI L2 - VLAN, LACP, vPC; Unicast routing - OSPF, BGP, Layer-3 virtualization; Multicast Routing Container technologies - Docker L1 - GigaEthernet - 10/25/40/100 Gbps Access Control Lists (ACL) / Quality of Service (QoS) / XML Desirable expertise includes experience in developing FPGA-based switches, Smart NIC or Merchant ASICs

Senior Development engineers or Leaders with proven Networking L2, L3 expertise with focus on Multicast, DHCP, VPC, etc Expertise in embedded C (mandatory), Cisco NX-OS, REST API / gNMI L2 - VLAN, LACP, vPC; Unicast routing - OSPF, BGP, Layer-3 virtualization; Multicast Routing Container technologies - Docker L1 - GigaEthernet - 10/25/40/100 Gbps Access Control Lists (ACL) / Quality of Service (QoS) / XML Desirable expertise includes experience in developing FPGA-based switches, Smart NIC or Merchant ASICs

Senior Development engineers or Leaders with proven Networking L2, L3 expertise with focus on Multicast, DHCP, VPC, etc Expertise in embedded C (mandatory), Cisco NX-OS, REST API / gNMI L2 - VLAN, LACP, vPC; Unicast routing - OSPF, BGP, Layer-3 virtualization; Multicast Routing Container technologies - Docker L1 - GigaEthernet - 10/25/40/100 Gbps Access Control Lists (ACL) / Quality of Service (QoS) / XML Desirable expertise includes experience in developing FPGA-based switches, Smart NIC or Merchant ASICs

We are seeking a skilled and passionate Embedded Systems Engineer to join our R&D team. The candidate will be responsible for designing, developing, testing, and debugging embedded hardware and firmware for cutting-edge products. Responsibilities : Design, simulate, and implement FPGA logic using Xilinx Vivado (HDL or HLS as per project requirements). Develop embedded C/C++ applications targeting MicroBlaze or ARM (Zynq) platforms using Xilinx SDK or Vitis. Design, develop, and debug firmware for embedded systems using C/C++ (e.g., STM32, MSP430, ESP32, etc.). Strong proficiency in VHDL or Verilog. Experience with C/C++ programming for embedded systems. Working knowledge of Xilinx SDK and/or Vitis. Familiarity with AXI interface, IP integration, and block design flow. Document design specifications, test procedures, and results. Preferred/Additional Skills: Hardware schematics and PCB design Why Join Us: End-to-end product development ownership (Hardware + Firmware) Opportunity to work on several products Collaborative, innovative work culture with career growth opportunities Exposure to aerospace and defense-grade systems.

4+ years of experience in C++ development, specializing in high-performance, low-latency systems. Deep expertise in modern C++ (C++14/17/20), multithreading, and concurrency. Strong Qt development experience for building real-time, high-performance trading UIs. Experience building ultra-fast order execution engines, market data feeds, and real-time risk management tools. Strong understanding of networking protocols (TCP/IP, UDP, FIX) and interprocess communication (IPC, shared memory, message queues). Hands-on experience with latency optimization, performance tuning, and profiling tools (perf, Valgrind, gprof, etc). Proficiency in memory management, lock-free programming, and CPU cache optimization. A deep understanding of exchange connectivity, order matching engines, and algorithmic trading systems. A hacker mentality you love solving problems that seem impossible. What You Will Do: Architect, develop, and optimize ultra-low-latency C++ trading applications that handle millions of transactions per second. Build high-performance market data processing solutions with microsecond-level latencies. Develop real-time, intuitive, and high-speed trading interfaces using Qt. Work on exchange connectivity, FIX protocol integrations, and risk management systems. Profile and optimize code to achieve maximum throughput and minimal latency. Solve some of the hardest engineering problems in fintech alongside an elite team. Experiment with new technologies to stay ahead of the competition. Own your work end-to-end from concept to deployment, pushing the limits of what s possible. Must-Have Skills: 4+ years of experience in C++ development, specializing in high-performance, low-latency systems. Deep expertise in modern C++ (C++14/17/20), multithreading, and concurrency. Strong Qt development experience for building real-time, high-performance trading UIs. Experience building ultra-fast order execution engines, market data feeds, and real-time risk management tools. Strong understanding of networking protocols (TCP/IP, UDP, FIX) and interprocess communication (IPC, shared memory, message queues). Hands-on experience with latency optimization, performance tuning, and profiling tools (perf, Valgrind, gprof, etc). Nice-to-Have Skills: Experience in high-frequency trading (HFT), market-making, or ultra-low-latency environments. Knowledge of exchange matching algorithms, order routing strategies, and market microstructure. Contributions to open-source C++ and Qt projects or performance-critical software. Expertise in hardware acceleration (FPGA, SIMD, AVX, GPU computing). Familiarity with cloud-based trading infrastructure and hybrid on-prem/cloud systems. Why Join Us? Be part of a high-energy startup with massive growth potential. Work with visionary fintech leaders and top-tier engineers. Build industry-defining products that will shape the future of trading. A culture that values bold ideas, rapid execution, and relentless optimization. Competitive compensation and a real opportunity to lead and innovate.

As the Lead Hardware Eng, you will be responsible for the electrical design of Multimedia, Medical, Aviation, Consumer and Industrial electronic products. We are looking for candidates who thrive in a fast paced start-up like environment. In your role, you will be the owner of all aspects of EE hardware design, including circuit/board design and validation. To be successful, you need to be highly motivated and detail oriented while showing highest standards of responsibilities. Qualifications Required: BE/B.tech in Electronics and Communication, Electrical and Electronics Engineering More than 10 years in design and development of Hardware design projects. Hands on Experience in Schematic design and Layout out design tools such as Mentor, Cadence, Orcad and Altium Experience in designing products for wireless networks (GSM, UMTS, LTE), GPS, WiFi, and Bluetooth wireless systems Digital, Analog, Mixed Signal Design Experience for consumer/industrial/medical markets ARM / Microcontroller Experience - TI, Qualcomm, Renesas, Xilinx, Altera FPGA. Hands on Experience in Simulation tools such as LTSPICE, TINA, PSPICE Experience in High speed design like DDRx, PCIe, MIPI, LVDS interfaces Audio and Video Design Experience - Cameras, LCD, HDMI, NTSC/CVBS Experience developing robust designs for ESD/EMI immunities and RF de-sensitization Experience integrating RF technologies such as WIFI, BT, GPS, etc Experience partnering with software teams to define and implement firmware, drivers and algorithms Battery operated product design experience Project monitoring, controls & Delivery. Team Handling & Team Mentoring Proposal & RFQ handling, BOM costing & optimization. Strong interpersonal skills and capability to manage and drive various cross-functional team members Understanding of high speed design and noise suppression techniques Hands on experience with signal integrity tools Experience in Multi-layer PCB Layout design approach & design reviews, SI knowledge. Experience of interaction with PCB fabrication house and assembly house for hardware build. Strong communication and documentation skills and ability to operate autonomously Complete understanding of manufacturing process including DFM and DFT for consumer products Exposure to Test and Measurement equipment such as Oscilloscopes, Signal Generators, Logic Analyzer, Spectrum analyzer Hardware Testing and Debugging Skills Electrical verification, Test plan creation and Testing Support for Certification Testing Hands on Experience in Microcontroller & processor Flashing and Debugging tools. Self-initiative and highly flexible

Emulation Engineer [Location: Noida] Experince: 10-20 Years [ Location: NOIDA] We are seeking a diligent Emulation leader to join our team at Renesas. Responsibilities include enhancing build/debug emulation methodology and flows, develop capabilities to run simulation testbench with emulation build, working with design/verification teams for XTOR building, selecting hardware, interfacing with software/platform teams, and setting high-level technical vision, along with executing the system-level-scenarios to ensure the quality (zero-bug) silicon tape-out. Responsibilities: Create full chip emulation and FPGA prototype models for the complex automotive SoC designs Create the test sanity suite to validate the models, having various integrated transactors and memory models Develop and apply automation aids, flows and scripts to improve emulation ease of use for the users Innovate improvements to emulation methodology, working with partners across other geographies Train and mentor engineers to deliver high quality and increase productivity Build strong collaboration with other R&D teams such as Design, Verification, digital IP, Design Enablement, and Validation to achieve project milestones Drive SoC verification using emulation (Hardware Assisted Verification), includes working with design, system-architect, verification teams to develop and execute the test plans for system-level-scenarios on emulation/prototype platform Work with the EDA vendors to deploy next generation emulation technologies Qualifications Qualifications: M.Tech/B.Tech Degree in Electrical/Electronic Engineering and a minimum of 4+ years relevant industry experience Emulation experience on any/all available platforms (Palladium, Protium, Veloce or Zebu, EP) including design bring-up, build flow, debug, performance and throughput tuning Experience with Verilog, VHDL complex SoC design Experience with System Verilog, UVM, C/C++ verification environment Knowledge of communication/interface protocols would be a plus: MIPI (CSI/DSI), PCIe, UCIe, ENET, LPDDR5/4, Hyper/Octal Flashes, eMMC, SD, UFS Knowledge of DFT and GLE flows would be a plus Know-How of the AI workload and its performance aspects would be a big plus Proficient in writing scripts using any languages (Perl, TCL, bash, Python) Experience with waveform debug tools, simvision/Verdi Strong communication skills and ability to work as a team Company Description Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier . As the industry s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, To Make Our Lives Easier .

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Candidate will join the custom circuit design team to execute the design of IOs/Analog/Mixed signal circuits & their integration into FPGA. Requirements/Qualifications: Experience Required in Few/all of the following design areas High Speed IO design and analysis in FPGA/SoC DDR/LPDDR design and Analysis Experience in General purpose IOs in different technologies Good understanding of ESD and Latch up Good Understanding of DDR timing and ODT functionality Experience in Signal/Power integrity simulations Voltage detectors, Current mirrors & voltage regulators Power on Reset circuits Simultaneous switching Noise and Jitter simulation. The IO design Group Is Responsible For Perform feasibility studies including idea creation; develop specification, design, and verification of the IOs. Write IP specifications, verification plans, and documentation Generate test bench and automatic regression plans Responsible for simulations, verifications, help in silicon bring up and characterization of IOs Candidate will be responsible for interface collaborate with and support multiple groups in organization Candidate may be expected to support customer questions and help in resolving the issues Required Skills and Experience: 5-8 years of related work experience. Good Knowledge in Circuit design and circuit analysis Experience in FinFet technology. Good knowledge of IC chip design, development flow, process, and methodology Good understanding of CMOS device operation and characteristics Must have circuit simulation experience using Cadence, Spectre, HSPICE , or equivalent tools Experience in running Solido variation designer Experience with UNIX shell scripting or Perl scripting Experience with SOC tools such as mixed signal simulators and Cadence Virtuoso is required Excellent written and verbal communication in English Good analytical and problem-solving skills Experience in silicon validation Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes Must be able to work independently, create and adhere to schedules Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

As a Hardware Engr II here at Honeywell, you will be responsible for contributing to the hardware design process from concept to production. You will collaborate with cross-functional teams to define hardware requirements and specifications and assist in designing complex hardware systems including schematic capture and PCB layout. Your role will also involve performing hardware testing and validation to ensure product performance and reliability. Additionally, you will provide technical support to junior engineers, stay updated with the latest industry trends and technologies, and contribute to the overall success of hardware design projects. In this role, you will impact by contributing to the development of high-quality hardware systems that enhance the performance and functionality of our products, ensuring they meet the highest standards of reliability and efficiency. At Honeywell, our people leaders play a critical role in developing and supporting our employees to help them perform at their best and drive change across the company. Help to build a strong, diverse team by recruiting talent, identifying, and developing successors, driving retention and engagement, and fostering an inclusive culture. YOU MUST HAVE Bachelor s degree from an accredited institution in a technical discipline such as science, technology, engineering, mathematics 2+ years of experience in hardware design and development Proficiency in schematic capture and PCB layout tools WE VALUE Advanced degree in Electrical Engineering or related field Experience with hardware testing and validation Strong problem-solving and analytical skills Knowledge of industry standards and best practices Experience with high-speed digital and analog circuit design Knowledge of FPGA and microcontroller-based designs Key Responsibilities Design and develop hardware components and systems Collaborate with cross-functional teams to ensure successful implementation Conduct testing and validation of hardware solutions Troubleshoot and resolve hardware issues Stay updated with industry trends and emerging technologies

About the Opportunity Job TypeApplication 23 June 2025 Title Senior Analyst Programmer- Platform Engineering Department FIL India Technology ISS Tech Location Gurgaon, India Level 3 Were proud to have been helping our clients build better financial futures for over 50 years. How have we achieved thisBy working together - and supporting each other - all over the world. So, join our ISS team and feel like youre part of something bigger. About your team Investment Management Technology provides systems development, implementation and support services for our globalInvestment Management division. We support Fund Managers, Research Analysts and Traders in all of our internationallocations, including London, Hong Kong, Ireland & Tokyo. About your role CRD delivery team needs highly motivated self-driven Analyst Programmer to provide Platform Support. The CRD platform consists of the Charles River product, CRD Integration Layer, PaaS and Kubernetes Services. CRD Platform is Fidelitys core trading platform, used by Portfolio Managers, Traders, Compliance and Post Trade. The core elements of the role are as follows: Platform Engineering - Primary objective of platform engineering is to focus on future planning and design of platform to maintain long term sustainability and supportability. Non-Production Incident management - Troubleshoot non-production issues and find root cause through analysis. Non-Production Support & Operations - Perform routine operational tasks such as critical batch monitoring, morning checks on applications readiness for business use, health check reports, maintenance etc Problem management & Change management - Identify and drive the changes required to bring stability on non-prod environments; Participate in Application releases, Infrastructure changes, Preventive maintenance activities like DR role swaps. About you Seasoned IT software delivery professional with an experience of 5+ years of relevant industry experience in supporting IT applications. Hands on experience on Unix scripting, Oracle & SQLServer, scheduling tools - Autosys and Control-M, IBM MQ, Kubernetes and Python. Understanding of DevOps concepts, Jenkins, Urban Deploy, JIRA and Power BI. Knowlege of Financial Domain (Investment Banking / Wealth Management) and understanding of Fixed Income and Equity Trading, Trade flow and Fund Management and FIX connectivity and infrastructure. Feel rewarded For starters, well offer you a comprehensive benefits package. Well value your wellbeing and support your development. And well be as flexible as we can about where and when you work finding a balance that works for all of us. Its all part of our commitment to making you feel motivated by the work you do and happy to be part of our team. For more about our work, our approach to dynamic working and how you could build your future here, visit careers.fidelityinternational.com.

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

As a Hardware at , you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today s market. Your role and responsibilities As Logic deisgn engineer for Power Management, you will be responsible for design and development of power management and sustainability features for high performance Processors chips. 1. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions 2. Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature 3. Guide junior engineers. Represent as Power engineer in various forums. 4. Signoff the Pre-silicon Design that meets all the functional, area and timing goals 5. Participate in silicon bring-up and validation of the hardwar 6. Estimate the overall effort to develop the feature and close design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of work experience of one or more areas Power management Architecture/ microarchitecture/ Logic design - Deep technical understanding of dynamic power saving, power capping, droop mitigation techniques. 1. Experience of working on Power Management designs handling Power/Performance States, Stop states of Core and Cache, Chip and System thermal management and power supply current over-limit management 2. Experience in working with research, architecture/ FW/ OS teams 3. Experience in low power logic design 4. Experience in working with verification, validation for design closure including test plan reviews, verification coverage 5. Good understanding of Physical Design, and able to collaborate with physical design team for floor-planning, placement of blocks for achieving high- performance design and timing closure of high frequency designs 6. Experience in silicon bring-up ABOUT BUSINESS UNIT

Emulation Engineer [Location: Noida] Experince: 8-12 Years [ Location: NOIDA] We are seeking a diligent Emulation leader to join our team at Renesas. Responsibilities include enhancing build/debug emulation methodology and flows, develop capabilities to run simulation testbench with emulation build, working with design/verification teams for XTOR building, selecting hardware, interfacing with software/platform teams, and setting high-level technical vision, along with executing the system-level-scenarios to ensure the quality (zero-bug) silicon tape-out. Responsibilities: Create full chip emulation and FPGA prototype models for the complex automotive SoC designs Create the test sanity suite to validate the models, having various integrated transactors and memory models Develop and apply automation aids, flows and scripts to improve emulation ease of use for the users Innovate improvements to emulation methodology, working with partners across other geographies Train and mentor engineers to deliver high quality and increase productivity Build strong collaboration with other RD teams such as Design, Verification, digital IP, Design Enablement, and Validation to achieve project milestones Drive SoC verification using emulation (Hardware Assisted Verification), includes working with design, system-architect, verification teams to develop and execute the test plans for system-level-scenarios on emulation/prototype platform Work with the EDA vendors to deploy next generation emulation technologies Qualifications M. Tech/B. Tech Degree in Electrical/Electronic Engineering and a minimum of 4+ years relevant industry experience Emulation experience on any/all available platforms (Palladium, Protium, Veloce or Zebu, EP) including design bring-up, build flow, debug, performance and throughput tuning Experience with Verilog, VHDL complex SoC design Experience with System Verilog, UVM, C/C++ verification environment Knowledge of communication/interface protocols would be a plus: MIPI (CSI/DSI), PCIe, UCIe, ENET, LPDDR5/4, Hyper/Octal Flashes, eMMC, SD, UFS Knowledge of DFT and GLE flows would be a plus Know-How of the AI workload and its performance aspects would be a big plus Proficient in writing scripts using any languages (Perl, TCL, bash, Python) Experience with waveform debug tools, simvision/Verdi Strong communication skills and ability to work as a team Company Description Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier . As the industry s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog Connectivity, and Power. With a diverse team of over 21, 000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, To Make Our Lives Easier .

Thales India Engineering Competency Center (ECC) in Bangalore is seeking a Technical Lead/Sr Technical lead to be part of Hardware engineering team. In this role, you will be responsible for Hardware subsystems architectural design, trade-off analysis, feasibility studies, Proposal preparation, Project scheduling/costing, Project monitoring and managing and IVVQ for various Thales products (Defense and aerospace applications). You will be coordinating with the Solution/System Architect and the Project Design Authority (PDA) to ensure consistency with the Solution/System architecture and with the hardware, industry and procurement strategies. Necessary to technically and functionally co-ordinate with engineers of hardware disciplines such as Board design (digital, analog, RF and power supplies), FPGA design (FPGA, ASIC), low-level software (in agreement with the software architect), mechanical design, testability and means of tests, industrial design (in agreement with the Head of Industry). This position requires having good level of expertise in its hardware product design, development and qualification. Qualifications: B.Tech/B.E in Electronics, Instrumentation engineering or equivalent with 10 to 15 years of relevant experience. Higher qualifications of Masters or Post-graduation is desirable. Domain experience in Avionics systems or defense system is desirable. Responsibilities: Develop, stabilize and maintain hardware architecture for all phases of the life cycle from design to delivery to customer. Perform trade-off analysis of different technologies and feasibility studies to propose the best architecture design Implement architecture choices based on trade-offs between cost, supply chain, customer requirements and technology possibilities Lead and coordinate the architectural studies of Hardware under his responsibility Perform trade-off analysis of different technologies and feasibility studies to propose the best architecture design Identify risks and opportunities related to the hardware architecture Propose and implement risk reduction plans and opportunities for validation Preparing project proposal including schedule and efforts Preparation of the associated project documentation and reviews Coordinating with different stakeholders like Industrialization, IPO, suppliers, engineering, WPM, customer to prepare the optimal project proposals Integration of Hardware, Software and Firmware and performs IVVQ Collaborative work applying quality standards and internal processes Ensure compliance with standards, product development plans (reuse policy), material, industrial and purchasing strategies Skills & experience: Must have strong experience in complete Hardware certified development life cycle (Technical feasibility, requirements writing, preliminary and detailed design, prototype manufacturing, test and evaluation, qualification and certification) Must have gained experience in piloting a lot of development work, involving in product testing in external labs for hardware products Must have experience in the IVVQ (Integration, Verification, Validation and Qualification) including requirements management Must have strong experience of integration of Hardware, FPGA firmware, mechanical packaging, low-level software and application software on Hardware unit. Must have good experience in bench test set-up, functional testing and performance evaluation Must have experience in developing IVV Test procedures (PVP/ATP), Test Reports (PVR/ATR), Qualification by similarity reports (QBSR) and other documents required by certification authorities for airborne products. Must have strong experience to troubleshoot on electronics and embedded hardware systems to find the root cause and to fix with a suitable solution. Must have experience to ensure the reporting progress of the project along with KPI. Must have experience to manage risks and opportunities at Hardware solution architecture. Must be rigorous, organized, autonomous and proactive, and motivated by a position within a multidisciplinary team. Must have demonstrated leadership skills on complex topics. Must have experience of working with multi-disciplinary team (BL engineering team, Lab technicians, external labs, Purchase team, Engineering teams and manufacturing teams) Must have experience in interfacing with external test facilities for environmental and EMI/EMC and other electrical tests as per MIL-STD/IEC61000/DO-160 standards. Should be familiar with Knowledge of production trades: procurement, manufacturing, delivery Knowledge of Certification DO254/DO160, Safety of aeronautical systems (ARP4761), and Knowledge of ARP4754B will be helpful. Product knowledge in avionics fields: civil and military calculators, displays, inertia, GNSS, probes will be helpful. Excellent communication and collaboration skills in an international multi-cultural environment (France, Canada, India, UK). Ability to work across different departments and establish effective relationships.

Computer Hardware Engineer Responsibilities & Duties Design, develop, and test computer hardware components and systems Collaborate with cross-functional teams to integrate hardware with software systems Perform thorough testing and debugging of hardware components Analyze and resolve technical issues related to hardware components Develop technical documentation for hardware designs and systems Stay up-to-date with industry trends and advancements in computer hardware engineering Provide technical support to customers and other stakeholders as needed Computer Hardware Engineer Qualifications & Skills Masters degree or higher in Computer Engineering, Electrical Engineering, or related field Experience with FPGA, PLC, or embedded systems development Proficiency in hardware description languages (HDLs) such as VHDL or Verilog Knowledge of circuit design and simulation tools Experience in high-speed digital design Familiarity with hardware security measures Strong problem-solving and analytical skills Excellent communication and teamwork abilities Experience with debugging and testing hardware Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field Expertise in hardware design, development, and testing In-depth knowledge of computer systems and components, including processors, memory, and peripherals Experience with schematic capture and PCB layout tools, such as Altium Designer or Eagle PCB Excellent problem-solving and analytical skills Strong verbal and written communication skills, including technical writing

Job Details: : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 8+ years of technical experience. Related technical experience should be in/withSilicon Design and/or Validation/Verification. Preferred Qualifications: Design and/or Design Verification with developing, maintaining, and executing complex IPs and/or SOCs. Experience in PreSilicon Performance Verification OVM/UVM, System Verilog, constrained random verification methodologies. The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. Experience in Xeon CPU Pre-Silicon or Post Silicon Validation. listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Job Details: : Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well as test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, and BSCAN). Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST). Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE). Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power, performance, area, timing, testcoverage, DPM, and testtime/vectormemory reduction goals as well as design integrity for physical implementation. Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications. Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure highquality integration of the IP block. Collaborates with postsilicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation. Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE. Qualifications: B.E/B.Tech/M.E/M.Tech in Electrical/Electronics/Communication Engineering with 7+ years of DFT experience Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Job Description In this position, the individual will be responsible for Designing, implementing, debugging firmware for the next generation storage devices (SD, USB, SATA). Typical activities involve the design and implementation of data structures, software algorithms, data path, and implementation of storage interface protocols, such as UFS, to deliver future cutting-edge storage products. You will develop firmware using multiple environments that include SW simulations, FPGA boards, and of course the final product HW. You will work in an Agile environment with advanced CI tools and capabilities that help develop clean code fast. You will work closely with excellent colleague engineers in Israel and India, cope with complex challenges, innovate, and develop products sold to leading mobile and automotive OEMs for millions of devices across the globe. Qualifications B.Tech. in Computer Science or Software / Computer / Electrical Engineering 2+ years of experience in RT / embedded systems and C development Previous RTOS experience - advantage (e.g. ThreadX / MQX / Nucleus / VxWorks / Embedded Linux) Experience in ARM or ARC processors family, debugging environments and tools NAND flash fundamentals Capable of developing wide system view for complex embedded systems Excellent interpersonal skills and team player Fast learner and implementer Great communication skills and fluent English, both verbally and written, and an ability to collaborate across cultural and organizational boundaries.

Implement Web applications in Python/Django Understanding project requirement & converting into technical requirements Independently do the coding/development of complex modules Independent contributor, high quality software within the timelines Ensure high quality releases through appropriate QC and QA activities Participate in technical discussions / reviews Works collaboratively and professionally with other associates in cross functional teams to achieve goals

This is a ASIC Hardware and Firmware Co-Verification Engineering role with the Security IP Team (SECIP). The primary focus of this role is to Lead the team responsible for Hardware/Firmware co-verification of various embedded micro-processor subsystems and the associated hardware accelerators in leading edge SOC s. The preferred candidate will also have proven experience in Firmware development and the ability to contribute to Firmware development initiatives. These IP subsystems provide high performance functions to the respective SoC, such as security policy management, cryptography, data compression, high throughput DMA, etc THE PERSON: You will have strong analytical/problem solving skills, high attention to detail, and motivation to independently drive tasks to completion. You will also have p rofessional interpersonal and communication skills. If this sounds like a role you are interested in, we welcome you to apply! KEY RESPONSIBILITIES : Development and verification of embedded firmware for SOC secure boot and embedded microprocessor driven hardware acceleration services for cryptography, decompression and large scale DMA functions. Hardware/Firmware co-verification in UVM System Verilog and C-DPI structured testbench. Hardware/Firmware co-verification in FPGA hardware prototype platform. Develop and maintain subsystem verification architecture, testbench, test methodology for Embedded CPU and subcomponent IPs with AXI/AHB busses and HW accelerators such as Cryptography, Data Compression, DMA, etc Participate in subsystem specification, influence IP micro-architecture development (HW and FW co-design and verification aspect), develop and verify abstracted performance model Create abstracted FW and HW performance models Develop critical target code to collect IP performance key parameters Explore subsystem architecture performance trade-off for FW and HW optimization Develop and execute subsystem and block level test plans Develop FW/HW co-verification methodology Develop UVC and System Response models Develop and debug UVM and C-DPI test cases with integrated FW Improve verification metrics Further develop subsystem and block level testbenches using UVM randomized test methodology and C-DPI directed test methodology. Develop and maintain subsystem level integration scripts Develop and maintain subsystem testbench build and test run scripts Drive to verification metrics closure Interface with SoC integration and SoC DV teams Define and develop IP level DV API to support SoC level DV effort Develop and maintain IP build and delivery infrastructure to support SoC level integration of SMU IPs. Support SoC level IP emulation, silicon bring-up and debugging effort PREFERRED EXPERIENCE: ASIC FW and HW design and verification experience Proficient in C, C++, Assembly, Verilog, System Verilog, and several scripting languages (Make, Perl, Python, etc) Excellent knowledge about UVM methodology and C-DPI methodology Excellent knowledge about standard bus/interface protocols (ie AXI, AHB, AMBA) Excellent experience with firmware design on commercial microprocessors Excellent experience with microprocessor tool chain, compiler, assembler, debugger Excellent experience with ASIC verification tools, simulation, linting, power aware simulation, etc ACADEMIC CREDENTIALS: Major in Electrical or Computer Engineering. B.Eng or masters or PhD Degree preferred.

We are looking for an FPGA / Embedded-Systems Engineer to join Arm s Solution Engineering FPGA team on a permanent basis working at the forefront of Arm based embedded design. Join our dynamic FPGA Prototyping team, a key part of Arms Solutions Engineering group! We are a dedicated group of engineers providing a robust platform to build and test software on Arms brand-new subsystems and System-on-Chips (SoCs). Our mission is to accelerate the development process by offering a versatile and high-performance prototyping environment that enables seamless software integration and validation. These solutions target a wide range of market segments including mobile, server, IoT, automotive, and more. you'll be part of a project team working collaboratively to create an FPGA prototype for enablement and validation, working with verification and software engineers. you'll have responsibilities estimating and owning tasks, delivering against a plan and have a strong focus on engineering efficiency and quality. The role will involve building a detailed technical understanding of incoming Arm IP RTL designs and making the relevant design changes of this ASIC RTL. The role includes RTL creation and modification along with implementation constraints with high-quality, clear, accurate technical documentation. The successful candidate will be responsible for delivery of designs using techniques such as gated clock conversion and synthesizable models to build accurate representations of real-world systems. Responsibilities: Modifying RTL from large complex systems to target a dedicated FPGA prototyping platform Working collaboratively to deliver to a structured plan Mentoring of junior engineers. Liaise and collaborate with development teams, where required, to understand requirements and guide design decisions, ensuring these are implemented and where not possible/feasible providing mitigations and alternatives. Translating technical requirements into estimated and sized packages of work that are direct inputs in forming a resourced project plan. Taking ownership, for your tasks, tracking to the project plan, identifying, and handling risks and reporting status Required Skills and Experience : Solid FPGA Engineer with strong technical skills are important for this role! Design automation is essential when constructing efficient design and delivery flows, scripting skills in Python and TCL would be advantageous. Detailed knowledge of the FPGA design flow from RTL design, simulation, synthesis, place & route, constraints, and timing closure Strong RTL skills in Verilog / System Verilog or VHDL. Knowledge and expertise in debugging sophisticated designs in both simulation and hardware. Excellent communications skills, written and spoken English; ability to write coherent documentation. Nice To Have Skills and Experience : Demonstrate an understanding of ASIC/SoC prototyping in FPGA. A creative and structured approach to problem-solving. Working with the latest Xilinx UltraScale+ devices and tools. Knowledge/Experience of implementation of PCIe/CXL and DDR memory sub-systems. Programming languages such as: assembly language (ideally Arm assembler), higher-level (eg C), object-orientated (eg C++) Use of a UNIX environment and shell programming Scripting skills in Python, Tcl, etc Experience and knowledge of Arm IP and the AMBA standard

Job Information Job Opening ID ZR_2322_JOB Date Opened 27/07/2024 Industry Engineering Job Type Work Experience 6-10 years Job Title Sr Hardware Engineer HW design and VAV City Khairatabad Province Telangana Country India Postal Code 500034 Number of Positions 1 Nature of Assignment / Roles & Responsibilities Supporting in development of new product, re-design and value engineering of existing products. Execute VAVE study and identify the cost out opportunities which are quality neutral. Design schematic of digital, mix signal & power electronics circuits to meet the requirement. PCBA prototyping, board bring-up and test, debug. Create the design documents, validation and test plan mapping to the requirements. Provide detailed requirement for FCT of PCBA to make sure meet design requirement. Essential Skills: AnalogPrecision amplifiers, Thermocouples and RTD, Pressure and flow sensors, High speed ADC and DAC. PowerLDOs, Switching regulators, High voltage circuits and AC-DC converters. Communication/Data interfaceSPI, I2C, LVDS, USB, Ethernet ProcessorARM processor family, FPGA and CPLD Component EngineeringComponent life cycle and RoHS, Reach compliance. Full time experience in digital and analog hardware design with advanced microcontroller, FPGA/CPLD, high speed ADC and DAC. Good experience with PCBA process and board bringup. Strong knowledge in alternate design analysis/part substitute for cost out ideas including design analysis for functional, quality and reliability. Experience in practices for Design for Test (DFT) and Design for Manufacturing (DFM). Proficient in test and debugging instruments like DSO, logic analyzer, spectrum analyzer and EMI/EMC test simulators. Hands on experience on EDA Tools like Altium, OrCAD and Mentor Graphics etc. check(event) ; career-website-detail-template-2 => apply(record.id,meta)" mousedown="lyte-button => check(event)" final-style="background-color:#2B39C2;border-color:#2B39C2;color:white;" final-class="lyte-button lyteBackgroundColorBtn lyteSuccess" lyte-rendered=""> I'm interested