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AMD
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Formal Verification Lead

Formal Verification Lead

AMD

3 - 9 years

3 - 7 Lacs

Bengaluru Karnataka India

Posted:1 week ago| Platform: Foundit logo

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Skills Required

Test Bench Verification

Work Mode

On-site

Job Type

Full Time

Job Description

KEY RESPONSIBILITIES:

Identify formal friendly modules/features across Data Fabric unit/subsystem and work with different stake holders in getting a thorough understanding of micro arch/high level spec and get clarification (if any).
Evaluate cross-feature/cross-unit dependency impact.
Populate detailed test plan (planned checks, abstraction, coverage) post feature analysis and get it reviewed & incorporate feedback.
Create Formal Test bench with assertions/assumptions with necessary level of abstraction in place to verify a complete feature.
Debug failures to root cause issues/fix constraints, deal with tool issues efficiently in collaboration with concerned AE from Synopsys/Cadence.
On a need basis, work on Post-Si bug recreation.
On a need basis, work on Flow automation related to Formal flow.

PREFERRED EXPERIENCE:

Prior experience on Formal verification on Complex IP's.
Proficiency in overall Formal Verification methodology with tools like (VC-FORMAL/JASPER).
Proficiency in creating test plans, building formal test benches from scratch.
Good understanding about computer architecture/microarchitecture and ability to deal with complex sequential logic and data path.
Good understanding of Verilog, System Verilog, SVA. Some knowledge of shell/perl/python scripting is a plus.
Should have leadership quality, quick thinker, pro-active, adaptable & outspoken/approachable.
Must communicate well both written and orally.
Must be well-organized and should be able to multitask well with due diligence on closing his/her tasks.

ACADEMIC CREDENTIALS:

Bachelor's or master'sdegree in Electronics or Electrical or Computer engineering

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