Engineer Yield Management System

As a member of Tata Electronics Private Limited (TEPL), you will be part of a greenfield venture of the Tata Group specializing in manufacturing precision components. You will have the opportunity to contribute to the development of India's first AI-enabled state-of-the-art Semiconductor Foundry, producing chips for various applications in markets such as automotive, computing, data storage, wireless communications, and artificial intelligence. Responsibilities: - Partner with the Digital/IT team for the design and development of Yield Management software and Database. - Design and create a Data Integration framework to collect data from different sources such as E-test, Defect Inspection, Inline Metrology, and Sort. - Develop algorithms for data analysis in Yield Analysis Tools to facilitate root cause understanding and yield optimization. - Collaborate with PI/YE, CFM teams, and vendors to drive continuous system improvements. - Generate automated yield reports for Automation & Reporting purposes. - Engage in Cross-Functional Collaboration with Product Engineering and Process Integration teams to gather requirements for software supporting yield management. - Ensure the reliability and scalability of the software for handling high volume data in System Maintenance & Scalability. - Deliver updates to internal and customer senior executives and be willing to travel as required. Essential Attributes: - Be self-driven, independent, and results-oriented. - Possess strong cross-functional collaboration skills working across global teams. - Maintain a continuous learning mindset and exhibit curiosity, data-driven decision-making, and resilience in problem-solving. - Communicate openly, humbly, and with a focus on building relationships. - Demonstrate creativity and agility in exploring new ideas and adapting to change. Qualifications: - Minimum Bachelor's degree in electrical engineering, computer science, or equivalent; Advanced degree preferred. - Experience in data analysis, failure/defect analysis, and yield improvement. - Strong understanding of device physics, process integration, yield improvement, and failure mechanisms. - Proficiency in writing basic code (e.g., Python, C++). - Familiarity with statistical techniques, data visualization techniques, operations dashboards, process modules, metrology/defect inspection tools, AI/ML basics, and an innovation mindset. Desired Experience Level: - 5+ years of experience in the semiconductor industry with specific expertise in E-test / Wafer Sort. - Proven structured problem-solving skills using methods like 8D and experience in programming and managing E-test systems.,