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Proxelera
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DFT Engineer

DFT Engineer

Proxelera

4 - 6 years

0 Lacs

hyderabad telangana india

Posted:2 days ago| Platform: Foundit logo

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Skills Required

scan insertion dft verification boundary scan design for testability

Work Mode

On-site

Job Type

Full Time

Job Description

Skills:

Design for Testability, Scan Insertion, ATPG, JTAG, Boundary Scan, Memory BIST, Logic BIST, DFT Verification,

Company Overview

Proxeleras unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. Proxeleras presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry. Proxelera has 51-200 employees and is headquartered in Bangalore, India. The company belongs to the Semiconductors industry. More information can be found at Proxelera.

Job Overview

We are seeking a highly skilled DFT Engineer to join our team in Hyderabad. The ideal candidate will have 4 to 6 years of relevant work experience and will be responsible for various aspects of Design for Testability. This is a full-time, mid-level position.

Qualifications And Skills

Minimum of 4 years of experience in the semiconductor industry, with a focus on DFT.
Proficiency in Design for Testability (Mandatory skill).
Experience with Scan Insertion (Mandatory skill).
Expertise in Automatic Test Pattern Generation (ATPG) (Mandatory skill).
Knowledge of JTAG and its applications.
Familiarity with Boundary Scan techniques.
Experience with Memory Built-In Self-Test (Memory BIST).
Proficiency in Logic Built-In Self-Test (Logic BIST).
Skills in DFT Verification and its methodologies.

Roles And Responsibilities

Develop and implement DFT architectures and methodologies for advanced semiconductor devices.
Perform scan insertion, ATPG, and fault simulation tasks.
Collaborate with design teams to ensure testability is considered in the early stages of product development.
Work on JTAG, Boundary Scan, Memory BIST, and Logic BIST implementations.
Conduct DFT verification and validation to ensure robust design testing.
Debug and resolve issues related to DFT including scan chain, ATPG, and other test-related challenges.
Optimize test coverage and test times for better yield and performance.
Create and maintain comprehensive documentation for DFT procedures and processes.

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DFT Engineer