DFT-DV Engineer (Lead)

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MTS SILICON DESIGN ENGINEER

THE ROLE:

Person in this role leads DFT Verification and Scan/ATPG.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ timezones . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

• Collaborate with architects, Designers and Post Silicon teams and come up with Detailed Test Plan
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware
• Drive verification Engineers and get the test cases developed and verified on time per each defined milestone of project
• Co-ordinate with Test Engineers and make sure to deliver right quality patterns and DV test cases to execute on Silicon
• Bridge between Test Engineers and Design teams in debug of any failures on Silicon and make sure to give all right support to Triage the issue till it resolvs.

PREFERRED EXPERIENCE:

• Proficient in Scan/ATPG, DFT DV
• P rior Experience in leading small teams in the domain of DFT
• Good knowledge on DFT Design, understanding DFT Architecture and translating the same for Implementation

• Experienced with Verilog, System Verilog, C, and C++

• Exposure to leadership or mentorship is an asset

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

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