CPU Power Engineer

General Summary:

• As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all
• As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products
• Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience
• ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience
• ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Job Overview

• We are looking for bright ASIC design engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering Snapdragon CPU design, flows for high performance SoCs in sub-10nm process for mobile space.
• Participate on a project involved in the development of ASICs, low power concepts, .
• low Power checks, timing and power analysis.
• Create design of experiments and do detailed comparison analysis to improve quality of results.
• Work closely with RTL design, physical design, low power and automation teams to optimize performance and power
• Tabulate metrics results for analysis comparison

Preferred Qualifications

• Extensive experience in Primetime/ptpx, PowerArtist, Synthesis with DCT/DCG or RC/RCP..
• Complete ASIC flow with low power, performance and area optimization techniques
• Experience with STA using Primetime and PTPX required
• Experience of multiple power domain understanding with complex UPF/CPF definition required
• Perl/Tcl scripting is required
• Strong problem solving and ASIC development/debugging skills
• Experience with CPU micro-architecture and their critical path
• High speed CPU implementation
• Place and route tool understanding