3 Cpu Design Jobs

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Exciting opportunity to work on Digital Flows/Methodologies architecture and development in energetic multi-site CAD team at Qualcomm.Our team support Simulation, Emulation, Formal Verification and Post Silicon domains providing ample opportunities to grow and contribute. Responsibilities As a Design Automation Engineer, you will work with RTL, architecture, design, DV, software, and silicon verification users. Develops, maintains, debugs and tests CPU Design Methodologies using Commercial EDA tools Defines and creates flows/scripts to help design teams execute Front-End (RTL) flows seamlessly Create unit, integration, regression, and/or system-level tests to thoroughly validate new features or changes. Work closely with Eng IT teams to setup flows which work well with the Engineering Compute Infra at multiple Datacenters Work closely with design teams to define methodologies, drive flow development, and deploy vendor tools Interfaces with external vendors to define, drive and incorporate the latest design solutions to improve productivity and time to market. Support design engineers on the flow setup and resolve their queries, automate tasks through appropriate tools and scripting. Review and debug code to identify and fix code problems. Qualifications Proficient with Python development and strong working knowledge of Linux operating systems Must have worked on Digital flows/methodologies development in the DV domains. Should have proficient skills with one of DV related tools Xcelium/VCS/vManager/Indago/Verdi or equivalent. Experience with CI/CD platform (like Airflow and Jenkins) and Version Control System (like Perforce and/or Git). MS/BS in Electrical/Computer Engineering with 8-14 years of demonstrated experience in CAD or EDA tools flows architecture, development, and support. Demonstrated experience with various EDA software, flows, and architectures & driving EDA vendors to provide feature enhancements and bugfixes. Ability to document design methodologies & provide training on tools and workflows to design teams Strong skills in debugging and analyzing techniques to understand existing scripts/flows; Ability to work independently and explore new domains Proven track record of pushing Prior experience debugging vendor tool problems

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a design verification engineer you will work with a fast paced Integrated Wireless Technology (IEEE 802.11) team, with various wireless technologies embedded into an ARM based SOC infrastructure. You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Skills/Experience: 6-15 years experience in Digital Design with a leading chipset company Decent knowledge in Wireless connectivity technologies:IEEE 802.11 a/b/g/n/ac/ax/be Knowledge in SoC architecture, including CPUs (preferably ARM), communications peripherals, multi-domain clocking, bus & interconnect structures, and power management Strong fundamentals in one or few of these domain areas - Wireless and Mobile communications, Information theory, Coding theory, Signal processing Strong knowledge on fixed-point implementation Truncation/Rounding/Saturation concepts Strong knowledge on Digital communication engines viz., Demodulator, Deinterleaver, Viterbi/Turbo Decoders, Sigma-Delta modulation, Base band filters, FFT etc.

Key Responsibilities: Verification Planning & Execution: Develop comprehensive verification plans for CPU cores and related components, including functional verification, performance verification, and edge-case testing. Design and implement testbenches for CPU verification using SystemVerilog, UVM, or other relevant verification methodologies. Perform functional simulation, debugging, and analysis to identify and resolve design issues or bugs. Test Development: Write and maintain test cases for different aspects of CPU functionality, including control logic, pipelines, cache systems, and other subsystems. Create directed and random test scenarios to validate different modes of operation, handling of exceptions, interrupts, and other critical events. Work on functional, performance, and stress testing to ensure the CPU design meets the required benchmarks. Simulation & Debugging: Run simulations on testbenches, monitor waveform outputs, and analyze results to identify discrepancies between expected and actual CPU behavior. Use debugging tools and techniques (e.g., waveform viewers, code coverage, assertions) to track down issues and drive them to resolution. Collaborate with the design team to troubleshoot and resolve failures in the design or verification process. Performance and Power Verification: Verify CPU performance through benchmark testing and performance analysis. Work with the architecture team to analyze and optimize CPU power consumption and verify power-related aspects of the design. Conduct stress and corner-case testing to identify performance bottlenecks. Collaboration with Cross-functional Teams: Work closely with architecture, RTL design, and validation teams to ensure alignment between the verification environment and CPU architecture. Participate in design reviews, ensuring that verification requirements are considered and covered in the CPU design. Provide feedback to the design team regarding improvements to architecture and implementation for better verification coverage.