WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.
Together, we advance your career.
THE ROLE:?We are seeking a seasoned SoC/Chip Design professional to lead the development of high speed networking silicon to address the data center AI networking market. You should have had significant success driving SOC design teams, interfacing with teams from RTL to GDS and helped in Post Silicon bring up and validation. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think-tank, and negotiate with design teams, marketing, and business unit executives.??THE PERSON:?You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.? You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.??KEY RESPONSIBILITIES:?
- Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams?
- Drive Design quality during front end integration via tools like LINT, CDC, LEC, SYNTHESIS etc.
- Collaborate with PD (Physical Design) team to establish a solid floorplan and align and drive hand off methodologies and metrics, improvements in schedules
- Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs?
- Comprehend SOC as a complete system which includes ASIC and FW and ensure that FW is aligned to enable all features, optimizing for performance and power?
- Work cross functionally with IP architects and designers to identify and assess complex technical issues/risks and develop system solutions to achieve product requirements?
- Support Post-Si teams for Product Performance, Power and functional issues debug/resolution and participate in Post-SI bring up
- Understand SOC architecture, identify key components, deliverables of internal and external IP vendors, develop integration strategies and execute on them
- Work closely with management to escalate issues to schedule, identify mitigation plan
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PREFERRED EXPERIENCE:?
