Associate Engineer, HIG HBM Layout

Job Description

We are looking for Layout Design engineer at our Micron Technology s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high-performance computing solution, High Bandwidth Memory. As a Layout Design Engineer, you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities Responsible for Layout design of leaf cell/Stdcell or sub block Have concepts of MOS basics, fabrication fundamentals and Analog layout basics Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design Demonstrate commitment towards the works/assignment and takes proactively measure to finish the work on time. Can interpret the DRC/LVS/ and other physical verification checks Effectively communicating with Internal teams to assure the success of layout project. Qualification/Requirements New College Graduates to 2 years experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET ) Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Understanding layout effects on the circuit such as speed, capacitance, power and area etc, Ability to understand design constraints and implement high-quality layouts. Attitude for attaining the problem-solving skills in physical verification of custom layout. Education BE or MTech in Electronic/VLSI Engineering (We will also consider exceptionally talented Diploma holders in electronic or VLSI engineering)