Posted:2 months ago| Platform:
Work from Office
Full Time
Verification of Analog and mixed signal circuits. Generation of a Full chip mixed signal simulation environment where analog, digital and FW co-exist. Schematic/behavioral model generation of certain blocks to make FC simulation feasible/efficient Device level electrical rule checks - SOA, snapback, sfb etc Static and dynamic simulations to identify the leakage paths SPF extraction and fanout, coupling checks Power cycling simulations - PL and Brown out events Chip level user mode simulations correlating analog subsystems, logic and FW algorithms Design data sheet review and generation of verification plan
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