Analog Layout engineers

4 - 8 years

0 Lacs

Posted:1 month ago| Platform: Shine logo

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Work Mode

On-site

Job Type

Full Time

Job Description

As a High-Speed Analog Layout Engineer at our company, you will be responsible for designing high-speed analog and mixed-signal layouts, focusing on advanced FinFET nodes such as TSMC 2nm, 3nm, 5nm, and 7nm. Your role will require you to have a strong background in custom layout for high-speed IPs like PLLs, SERDES, clock buffers, and data paths. Key Responsibilities: - Hands-on experience in custom layout for high-speed IPs including PLLs, SERDES, clock buffers, and data paths - Proficiency in tools like Cadence Virtuoso, Calibre DRC/LVS, and PEX flows - Demonstrated track record of delivering clean layouts with successful DRC/LVS/EM/IR sign-offs through multiple tapeouts - Expertise in layout techniques for matching, shielding, parasitic control, and achieving GHz-speed performance - Sound understanding of floorplanning, symmetry, and addressing advanced process challenges Qualifications Required: - Bachelor's degree in Electrical or Electronics Engineering - Strong problem-solving skills and a collaborative mindset Join us if you have the required experience and skills to excel in high-speed analog layout design and contribute effectively to our team.,

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