Wireless R&D IP Verification Engineer, Principal

General Summary:

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

Bachelor''s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. ORMaster''s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

Location: Bangalore

Key Responsibilities

• Technical Leadership
  • Define and own verification strategy for IP/Block/Subsystem-level DV.
  • Guide the team in developing robust verification environments and methodologies.
  • Ensure best practices in coverage-driven and assertion-based verification.
• Execution
  • Oversee end-to-end DV tasks: design analysis, verification planning, testbench development, simulation, and coverage closure.
  • Drive adoption of advanced DV methodologies (formal, simulation, emulation) for efficiency and quality.
  • Review and optimize test plans, environments, and scripts for scalability and reuse.
• Collaboration
  • Work closely with global design, architecture, and cross-functional teams to meet project milestones.
  • Communicate effectively with stakeholders on progress, risks, and mitigation plans.
• Mentorship
  • Coach and mentor junior engineers, fostering technical growth and best practices.

Required Skills Experience

• Vast experience in IP-level design verification
• Strong expertise in SystemVerilog/UVM and coverage-driven verification methodologies.
• Proven experience architecting and maintaining complex SV/UVM environments.
• Proficiency in constraint-random testing and achieving coverage closure.
• Strong debugging skills using tools like Verdi or similar.
• Exposure to wireless IPs (Wi-Fi, Modem PHY, DSP blocks) is a plus.
• Familiarity with formal/static verification techniques.
• Power-aware verification and Gate-Level Simulation (GLS) experience is highly desirable.
• Scripting skills (Python, Perl) for automation.

Qualifications

• Education: Bachelors or Masters or PhD in Electrical/Electronics/Computer Science from a reputed institution.
• Experience: 10-18 years

Soft Skills

• Excellent communication and collaboration skills.
• Ability to lead and motivate a technical team.
• Strong problem-solving and decision-making abilities.