We are Hiring Design Verification Engineers

Exp: 5+ Years

• Extensive experience in IP/SOC Verification.
• Proficiency in System Verilog and UVM.
• Hands-on experience in verifying IP protocols such as PCIe, DDR, USB, Ethernet, CXL, HDMI, MIPI, DSI, CS, GLS, CPU Verification, or other high-speed protocols.
• Familiarity with scripting languages like Python, Perl, TCL, etc.
• Experience in assembly language or C is a plus.
• Ability to develop testbenches from scratch and take ownership of the entire verification process, including subsystem/chip-level coverage.
• Strong debugging skills.

Key Responsibilities:

• Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance existing ones for IP, Subsystem, or SOC verification.
• Understand design specifications to define the verification strategy.
• Create testbench micro-architecture, test plans, and coverage plan documents.
• Define verification scope, develop test plans, tests, and verification infrastructure to ensure design correctness.
• Implement SystemVerilog assertions and functional coverage.
• Analyze code coverage and address missing scenarios to meet coverage goals.
• Collaborate with verification team members to develop, execute, and analyze test cases and sequences.
• Work closely with architects, designers, and pre- and post-silicon verification teams to meet deadlines.
• Coordinate with customer leads, ensuring all deliverables and timelines are met.
• Serve as the project's point of contact, responsible for verification signoff.

If you or someone in your network is interested, please apply here or directly reach me on [HIDDEN TEXT]

Looking forward to your response.