110 Vlsi Design Jobs - Page 3

You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols such as Ethernet, DDR, and PCIe Your technical expertise is complemented by your hands-on experience in simulation, synthesis, and static timing analysis (STA) With a Bachelors and/or Masters Degree in Electrical Engineering or a related field, you bring at least 10 years of design, verification, or application engineering experience to the table You thrive in a UNIX environment and are proficient with ASIC/SoC tape-out processes from concept to full production Your ability to work across teams, coupled with strong analytical, reasoning, and problem-solving skills, sets you apart as a creative and results-oriented professional Excellent verbal and written communication skills in English are essential, as you will be collaborating with customers and teams worldwide Occasional travel is something you are comfortable with, and you are ready to take on the challenge of integrating leading Interface IP into next-generation products What You ll Be Doing: Acting as a trusted advisor for our Interface IP customers, providing guidance throughout their SoC flow. Supporting customers in resolving technical challenges and performing integration reviews at key milestones. Assisting with silicon/system bring-up and debugging critical issues. Collaborating with internal teams to deliver tailored solutions to customers. Staying updated with the latest industry specifications and applications in various hot market segments. Participating in occasional travel to support customer engagements and silicon bring-up activities. The Impact You Will Have: Enhancing the usability and adoption of Synopsys Interface IP products by providing expert technical support. Facilitating successful integration of IP into customer designs, contributing to their product development timelines. Improving customer satisfaction by resolving technical issues efficiently and effectively. Driving innovation by working with cutting-edge technologies and industry specifications. Strengthening Synopsys market position through successful customer engagements and support. Contributing to the development of next-generation products that leverage high-speed protocols and advanced IP. What You ll Need: Bachelors and/or Masters Degree in Electrical Engineering or similar with a focus on VLSI design. At least 10 years of design, verification, or application engineering experience. Proficiency in RTL coding using Verilog/VHDL. Experience with high-speed protocols such as Ethernet, DDR, and PCIe. Hands-on experience with simulation, synthesis, and static timing analysis (STA). Familiarity with UNIX environments and ASIC/SoC tape-out processes. Knowledge of CDC, RDC, Lint, DFT, STA, and LEC is a plus. Who You Are: Creative and results-oriented, capable of managing multiple tasks concurrently. Strong verbal and written communication skills in English. Ability to work collaboratively across teams to deliver solutions to customers. Strong analytical, reasoning, and problem-solving skills. Willingness to travel occasionally to support customer engagements.

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilities: Expected to be an SME, collaborate, and manage the team to perform. Responsible for team decisions. Engage with multiple teams and contribute on key decisions. Provide solutions to problems for their immediate team and across multiple teams. Lead and mentor junior team members. Conduct code reviews to ensure code quality and adherence to coding standards. Professional & Technical Skills: Must To Have Skills: Proficiency in Emulation platform like Palladium/Zebu/Veloce/HAPS. Strong understanding of SOC Architecture Experience with debugging using any Emulation Palladium/Zebu/Veloce/HAPS platform. Hands-on experience with ARM (A/M) architecture. Knowledge of C language. Additional Information: The candidate should have a minimum of 5 years of experience in Emulation. This position is based at our Bengaluru office. A 15 years full-time education is required. Qualification 15 years full time education

Skills :. Experience in project management, with a focus on the front-end stages of semiconductor chip design, technical background in digital design, verification, and synthesis,EDA Tools Required Candidate profile Notice Period: immediate Education: Masters in VLSI design from reputed universities like IIT/NIT with background in Bachelors in Electronics and Communication, or a related field

Job Overview: The Program Manager for Chip Design will oversee the entire lifecycle of semiconductor design projects, from initial concept through to tape-out and GDSII handoff. The ideal candidate will ensure project deliverables meet time, cost, and quality objectives by coordinating cross-functional teams, managing resources, and aligning internal and external stakeholders. This role involves close collaboration with engineering, operations, and customer-facing teams, requiring both technical expertise and leadership abilities.

Responsibilities may be quite diverse of a technical nature. Need to understand VLSI testing and vectors for ATE . Vectors/Content stabilization, implementation and validation of various DFT features. Understand the system level testing and work towards meeting DPM requirements. Need to work towards automation. Qualifications Pursuing Master Degree in Electronics or Computer Engineering and available for 1 year internship program to work Intel's chipsets. Need to have good understanding of CMOS, VLSI design and Test. Knowledge of Scripting in Perl, shell, Python . A very good team player with good interpersonal, planning and excellent communication skills. Preferred colleges Any IIT, Any NIT, MIT, VIT, Thapar Eng College, Delhi College of Engineering , PES, Punjab Eng College ,RVCE.

Looking for Siemens EDA ambassadors: Advanced Product Engineer Siemens EDA D2S Bangalore group, a part of Semiconductor Manufacturing Division of Siemens EDA, is looking for a committed Advanced Product Engineer to support, define and improve software solutions in the semiconductor manufacturing domain of Mask Data Preparation (MDP). The Advanced Product Engineer for Calibre Semiconductor Manufacturing Products is responsible for the process of compiling requirement specifications for data preparation software and production tape-out flows for the semiconductor manufacturing covering the applications from layer extraction and Boolean operations, through resolution enhancements and optical proximity correction (OPC), verification and mask process correction and data preparation and interacts with engineering during implementation and testing for new functionality. The TME works closely with the software development team, the product team as well as a team of product engineers in related product lines. We make real what matters This is your role Support key customer engagements such as benchmarks, feature evaluation, tool/flow deployment etc. Develop and deliver training materials to customers and field. Develop Product Requirement Documents (MRDs), from customer requirements and industry trends, that describe product features with sufficient detail that Software Development engineers can develop new features accurately Work closely with R&D, QA, and field to bring features to production, including testing and characterizing new features, filing defect reports and enhancement requests, developing materials to track and communicate development. Promote MDP products by creating product materials that characterize new features, write application notes, and conference papers to communicate new feature flows to customers, field, and industry. Travel to customer sites when required to provide technical support and to receive customer feedback. Participate in and sometimes lead telecom meetings with customers and/or with internal Siemens personnel. Develop an understanding of the markets Siemens EDA products serve by doing literature research and by attending technical conferences. Develop test cases and test methodology to test existing and new product functionality and to solve problems or failures identified with internal testing or by customers. The role requires a self-motivated individual with a keen curiosity for learning and passion for semiconductor domain and related flows. Below are the necessary and desired skills: We dont need superheroes, just super minds We bring together a dynamic team of individuals with a B.Tech/M.tech or equivalent experience in Computer Science or Electronics Engineering with shown experience Proficiency with Linux shell environment and one or more high level scripting languages such as TCL, Perl or Python Familiarity with VLSI design and tape-out flows Excellent know-how of basic statistical analysis and data handling/management. Strong analytical problem solving and debugging skills. Demonstrated ability or willingness to work in a matrixed and multi-functional environment Technical Skills (Desirable): Experience with DRC/MDP/MPC/OPC tools (or similar tools from other EDA companies). Domain knowledge in one or more of the following: optics, photolithography, electron beam lithography, electronic design automation, TCAD, integrated circuit design, physical verification. Experience working in Linux distributed computing environments and Cloud Strong interest in IC Design, Verification and the technologies required to enhance the resolution and performance of lithography and manufacturing process of masks and wafers through data manipulations Experience with layout processing tools used for geometry processing and related scripting/programming environments Experience with customer engagement and project leadership

Work in a VLSI wireless team. Major subject VLSI, digital circuit, analog circuit. Project done on related topics preferably using CAD tools and familiar to ASIC design flow. Qualifications Degree:ME/M.TECH VLSI design, signal processing and machine learning, communication engineeringSchools: NIT/VIT

About The Role This position is for an experienced, motivated, and passionate circuit design engineer with expertise in the area of custom circuits memories, SSARF SRAM, Register File, ROM design for GHI CCG SAI Circuits Team. In this position you will be working in a team responsible for delivering high quality designs for graphics projects. You would also be involved in key decisions finalizing the memory architecture that best meets the design requirements of the program, technical readiness involving circuit simulations and responsibility for implementation as well as convergence of the design while meeting high circuit quality. The key responsibilities include ownership of tools, flows, methodologies as well as coming up with innovative design implementations with focus on power and area reduction. The role would require deep understanding of transistor and circuit behavior, strong communication, problem solving skills, time management and multitasking skills. The team members have also an opportunity to diversify their skills into other custom circuits as well as working with the client in integration of the custom circuits. Qualifications Minimum QualificationsMinimum 4-7 years of experience in designing and delivering of SRAM's/RF's/ROM's. Understanding of semiconductor device physics; VLSI Technology and VLSI circuits (analog/digital), Familiarity with spice simulations and Verilog and other tools for design and development of memory IP's like ESPCV, Nanotime, Nova, Totem etc. Knowledge of scripting (PERL/TCL/Python) is desirable, Preferred Educational QualificationsME/Mtech/MS in Microelectronics/VLSI Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Roles and Responsibilities Good communication and analytical problem solving capability. Should be having hing level understanding for Design, develop and test various types of antennas for various applications. Conduct research and evaluate the performance of novel antenna design CST/ HFSS/ MATLAB software skills are preferred Develop and maintain technical documentation, including test plans and reports Should have knowledge related to fabrication and testing of the designed antenna. Good communication and analytical problem solving capability. Hands-on experience on FPGA / RTL Design involving verilog HDL,Cadence, Vivado ISE/Xilinx ISE, Modelsim and Synopsys will be an added advantage. Desired Candidate Profile B.E. or B.Tech with minimum one year of work experience. M.E. or M.Tech fresher. Perks and Benefits Salary, monthly grocery and medical insurance.

Job Title: 100% Placement Guaranteed Training & Placement Program (NXP, AMD, Intel & More!) Company: Setronyx Technologies Pvt Ltd Location: Bangalore (Online, Offline, or Both ) Job Description: Kickstart Your Career with a 100% Placement Guarantee! Setronyx Technologies Pvt Ltd is revolutionizing the tech talent landscape by offering a unique training and placement program with a guaranteed 100% money-back placement assurance. We've partnered with industry giants like NXP, AMD, Intel, Tech Mahindra, Mirafra Technologies, LeadSoc, NVIDIA, MediaTek, Qualcomm, Samsung, and Micron to provide you with unparalleled career opportunities. Why Choose Setronyx? 100% Placement Guarantee: We are confident in our program and guarantee placement in our partner companies. If we fail to place you, we will refund your entire program fee. Top-Tier Partner Companies: Gain access to exclusive opportunities at leading technology companies. High-Demand Skills Training: Our comprehensive curriculum is designed to equip you with the skills employers are actively seeking. Average Salary Package: Secure a competitive salary package ranging from 6 to 15 LPA , based on your performance and the role. Flexible Learning Options: Choose between online and offline training modes to suit your learning preferences. Industry-Experienced Trainers: Learn from seasoned professionals with extensive industry experience. Dedicated Placement Support: We provide end-to-end placement assistance, including resume building, interview preparation, and networking opportunities. Outsourcing Company Partnerships: We also have partnerships with outsourcing companies, expanding your job market reach. Who Should Apply? Fresh Graduates in Engineering (B.E./B.Tech),2012-2024 Gap Candidates also MSC electronics and BSC Electronics, or related fields. Individuals seeking to upskill and transition into high-demand tech roles. Anyone passionate about building a successful career in the technology industry. Skills We Focus On: [ VLSI, Asic , Physical design, GDS, DFT,PV,STA,SYNTHESYS,ICC TOOLS,EDA TOOLS Embedded Systems, ] How to Apply: Email: hr@setronyx.com Call us : +91 8074 64 0635 Don't miss this opportunity to launch your career with a guaranteed placement! Apply Now!

Job Description Responsibilities may be quite diverse of a technical nature. Need to understand VLSI testing and vectors for ATE . Vectors/Content stabilization, implementation and validation of various DFT features. Understand the system level testing and work towards meeting DPM requirements. Need to work towards automation. Qualifications Pursuing Master Degree in Electronics or Computer Engineering and available for 1 year internship program to work Intel's chipsets. Need to have good understanding of CMOS, VLSI design and Test. Knowledge of Scripting in Perl, shell, Python .A very good team player with good interpersonal, planning and excellent communication skills.Preferred colleges Any IIT, Any NIT, MIT, VIT, Thapar Eng College, Delhi College of Engineering , PES, Punjab Eng College ,RVCE

Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school. Qualifications Mtech graduate with below skillsHardware : VLSI Design, Custom Layout, ESD verification Software : Python, perl Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role About The Role As a SoC Micro-Architect, you will be responsible to work on feasibility of feature requests, partitioning them effectively and proposing an effective implementation which meets the desired Power, Performance and Area targets. You will need to work with cross functional teams and will be responsible for defining Micro-architecture specifications. Work with SoC Architecture, Platform, Firmware, Logic, Validation, Physical and DFT teams in defining and guiding SoC design implementationResponsibilities and duties:* Work with SoC Architecture to interpret high level architecture specs* Drive feature analysis and scoping* Define micro-architecture specifications.* Perform feasibility study on different third-party IP and drive integration* Drive RTL Implementation team, work closely with Backend team on floorplan, Constraints definition and timing analysis.* Closely work with Verification team and help define test plan and debug design.* Participate in design reviews.* Participate and drive timing convergence for high-speed designs including micro- architecture optimizations* Collaborate with internal and external team members on architectural decisions, development flows and methodologies* Lead end to end feature implementation and enablement.* Responsible for meeting SoC design quality, performance and power goals Qualifications Required qualifications:Educational requirements for this position are a BSEE/CE minimum, MS preferred.Also required 18 plus years' experience in IC/SoC Design and Micro Architecture* Experience in all phases of logic development lifecycle from high-level specification to tape-out and production* Expertise in one or more of the following domains* AI server Micro Architecture* Power Management* Cache Management* Inter die IOs Micro Architecture* HBM IOs Micro ArchitectureBehavioral Traits* Excellent communication and documentation skill.* Must be skilled to influence in heavily matrixed environment.* Capable to operate in ambiguity where roles may not be clearly defined or teams across multiple/functions and IP/SOC must be pulled together.In this role you will be part for the Data center group (XEG - India) design team, working on next-generation Server and AI products. Inside this Business Group Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

About The Role Designs, develops, and builds digital circuits for custom blocks including SRAM, register files, memory compilers, and caches. Designs floorplans, performs circuit design, schematic entry, simulation for major blocks, and verifies functionality to optimize custom circuit for power, performance, area, timing, and yield goals. Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design. Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and memory circuit design issues. Optimizes performance, power, and area, reduce leakage of circuits, and drive characterization of individual memory instances and memory compilers. Works with architecture and layout teams to design circuit for best functionality, robustness, and electrical capabilities. Qualifications The candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum qualifications Must have a Bachelors (B.Tech) in Electronics or Masters (M.Tech) in Electrical, Microelectronics or VLSI Engineering. B.Tech with 8+ years and M. Tech with 6+ years' experience required. 6+ years' experience with scripting (Perl, tcl etc. 6+ years' experience in memory design convergence tools including formal equivalence verification, static timing methodology, electrical reliability and robustness analysis. 6+ years' experience with transistor level operation, memory bitcell design, design challenges under process variations and low power circuit techniques, Innovative architectural proposals, driving layouts and its driven decisions. Preferred Qualifications Some experience in scripting, compiler understanding and hands on experience in coding tilers. Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in theTechnology Development and Manufacturing Groupare part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project

? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project

About The Role Develops pre silicon functional validation tests to verify system will meet design requirements Creates test plans for RTL validation defining and running system simulation models and finding and implementing corrective measures for failing RTL tests Analyzes and uses results to modify testingKnowledge of Verilog ,System Verilog, UVM Based Testbench developmentUnderstanding of code functional coverage system Verilog assertion codingGeneral Scripting and programming skills Python Per TCL etcFormal verification would be a plusIP Level testbench development using SV and UVMTestplan development using Verification planner, tracking and closer of code and functional coverageReq LocationSRR4 Bangalore About The Role Your responsibilities include but are not limited to: Define and develop test env to verify the IP/Sub System functionality. Define Test plans and develop Tests contents.Define Checkers/monitors strategy. Define and Develop Assertions.Define Cover points and analyze functional coverage with analysis. Define Volume regressions strategy and run simulations followed by failure debugs. Develop formal verification assertions, properties. Define and perform Performance Verification. Mentoring and coaching junior verification engineers. Leadership to manage stake holders with end to end objectives in mind. The candidate should have ability to work effectively with both internal and external teams/stakeholders. Should possess strong problem solving/communication skills. Should be a very good team player. Qualifications QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Candidate should possess a Bachelor's degree in Electrical, Electronics, Computer Engineering or Computer Science or any related field with 7+ years' experience -OR - a Master's degree Electrical, Electronics, Computer Engineering or Computer Science or any related field with 5+ years experience -OR- PhD degree in Electrical, Electronics, Computer Engineering or Computer Science or any related field with 3+ years experience in:VLSI design.Verification/validation tests.Expertise in System Verilog/C++/OVM or UVM methodology and/or Formal Verification techniques.Preferred qualification:System simulation models, and debugging RTL/tests.Experience with Cache Coherency protocols or PCIE/CXL would be a huge plus Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project

In this position, the candidate will be responsible for design of soft IP cores for Intel's next generation chips (including SOCs) for the different market segments.The engineer will be responsible for the execution and quality of at least 2 IPs and will sign off all design checks and interact with SOC for all integration issues Qualifications Qualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 14 years of relevant industry experience. Experience : Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification Expertise in design, development and integration of design blocks (IP) for system-on-chip (SoC) componentsExpertise in verilog and system verilog based logic design Experience in all design tools like linting, DC, CDC, LEC Experience in one/more of the following areas PCI_Express, USB, SATA, SDIO,MIPI and /or AMBA standards (OCP, AXI, AHB etc..) Knowledge of SVAKnowledge of RAS domain is a bonusKnowledge of considerations for performance, power and cost optimization is desirable

Mobile Chip Design Industry Expert Mode: Online (Weekends) | Duration: 1 Hour Seeking a professional with 5-10 years in mobile chip design (Qualcomm Snapdragon preferred) to deliver 1 hour online workshop for college faculties.

We provide VLSI design expertise to global customers with quality, timeliness and cost-effectiveness - IC design implementation from RTL to netlist including synthesis, timing constraint composing - IC physical implementation from netlist to GDSII, including floor planning, power grid implementation, place and route, clock tree synthesis, timing ECO, design closure - IC design verification including timing analysis, timing signoff, formal verification and low power verification. - IC physical verification including physical verification, crosstalk analysis, power analysis, ESD analysis, EM analysis Responsibilities : - Team Leadership : Lead and manage a team of physical design engineers responsible for implementing IC designs from RTL (Register Transfer Level) to GDS (Graphic Data System) using industry-standard tools and methodologies. - Project Planning : Develop project plans, schedules, and resource allocation for physical design projects, ensuring timely and high-quality delivery of IC designs. - Physical Design Flow : Define and optimize the physical design flow, including floor planning, power planning, placement, routing, clock tree synthesis, and timing closure, to meet design goals and performance targets. - Design Methodology : Implement and improve physical design methodologies, guidelines and best practices to enhance productivity, quality, and design scalability. - Tool Evaluation and Selection : Evaluate and select physical design tools, EDA (Electronic Design Automation) software, and technologies to support design requirements and optimize design efficiency. - Design Verification Support : Collaborate with design verification teams to ensure physical design readiness for tape-out, including DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC (Electrical Rule Check) verification. - Cross-functional Collaboration : Work closely with RTL design teams, architecture teams, verification teams, and backend teams to address design challenges, resolve issues, and optimize design performance. - Quality Assurance : Implement quality assurance processes, checks, and reviews to ensure compliance with design rules, standards, and specifications. - Documentation : Maintain documentation related to physical design methodologies, design constraints, design reviews, and tape-out procedures. Qualifications : - Education : Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, with a focus on VLSI (Very Large Scale Integration) design or physical design. - Experience : Several years of experience in physical design of complex IC products, including experience in a leadership or management role overseeing physical design projects. - Physical Design Tools : Proficiency in using industry-standard physical design tools such as Cadence Innovus, Synopsys ICC, Mentor Calibre, etc., and familiarity with EDA tools for timing analysis, power analysis, and physical verification. - Design Methodologies : Knowledge of advanced physical design methodologies, including floor planning, placement optimization, routing strategies, clock tree synthesis, and timing closure techniques.

Job Overview: Program Manager The Program Manager for Chip Design will oversee the entire lifecycle of semiconductor design projects, from initial concept through to tape-out and GDSII handoff. The ideal candidate will ensure project deliverables meet time, cost, and quality objectives by coordinating cross-functional teams, managing resources, and aligning internal and external stakeholders. This role involves close collaboration with engineering, operations, and customer-facing teams, requiring both technical expertise and leadership abilities. Key Responsibilities: End-to-End Program Management: Lead the planning, execution, and delivery of semiconductor chip design programs, managing the flow from RTL design to GDSII. Oversee project milestones, timelines, and deliverables, ensuring alignment with business goals and customer requirements. Track program progress using key performance indicators (KPIs) such as schedule, cost, quality, and risk. Cross-Functional Team Leadership: Coordinate with design, verification, DFT, physical design, and product engineering teams to ensure seamless execution of chip development. Work closely with product marketing, software, and manufacturing teams to align on product goals and technical specifications. Facilitate regular status meetings, design reviews, and updates to keep stakeholders informed and aligned. Risk Management and Mitigation: Identify, assess, and mitigate risks throughout the chip design lifecycle, including technical challenges, timeline delays, and resource constraints. Create contingency plans to manage project risks and resolve issues promptly. Stakeholder Communication: Act as the primary point of contact for internal teams, external partners, and customers throughout the programs duration. Manage communication between internal engineering teams, vendors, and customers, ensuring all parties are informed of progress, changes, and risks. Resource Management: Manage program resources, including engineering teams, tools, and external partners, to optimize project efficiency. Work with management to forecast resource needs, manage budgets, and ensure optimal use of manpower and tools. Documentation and Reporting: Maintain detailed documentation on project deliverables, timelines, issues, and solutions. Provide regular status reports to executive leadership, highlighting progress, risks, and budget status. Customer Interface: Collaborate with customer teams to clarify chip requirements, provide technical guidance, and ensure that design specifications meet customer needs. Coordinate customer deliverables and ensure a smooth transition from development to production. Post-Tape-Out Support: Provide ongoing support after GDSII handoff, ensuring successful product verification, testing, and ramp-up into production. Manage post-tape-out changes, including any necessary re-spins or design modifications, while minimizing impact on timelines and cost. Qualifications and Skills: Educational Background: Bachelors or Masters degree in Electronics/Electrical/Computer Science. An MBA is a plus. Experience: 7+ years of experience in program or project management in the semiconductor industry, particularly in chip design (from RTL to GDSII). Proven track record of managing complex VLSI/ASIC/SoC projects through multiple development phases. Technical Knowledge: Strong understanding of the chip design process, including RTL design, physical design, DFT, and tape-out processes. Familiarity with EDA tools (e.g., Synopsys, Cadence, Mentor) and design methodologies. Knowledge of semiconductor fabrication processes and post-GDSII phases such as validation and product engineering. Project Management Skills: Expertise in project management tools (e.g., MS Project, JIRA, or others). Strong organizational skills and attention to detail. Soft Skills: Excellent verbal and written communication skills for both technical and non-technical audiences. Strong leadership and interpersonal skills, capable of working across departments and with customers. Proactive problem-solving abilities and experience in managing conflicts and change requests. Certifications (Preferred): PMP (Project Management Professional) certification or equivalent is a plus. Knowledge of functional safety standards (ISO 26262) or industry-specific requirements like ASIL is a plus. Why Join Us: Be part of an innovative team driving the future of semiconductor technology. Opportunity to work on cutting-edge chip designs for industries like automotive, consumer electronics, IoT, and more. A dynamic and collaborative work environment with opportunities for growth and career advancement.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project

Key Responsibilities: Ownership of Developing Leads / Client Pipelines from the USA Canada Month-on-Month: Meeting targets End-to-end responsibility for prospect development (Cold calling, LinkedIn, Social Media, Video-Discussions, referrals etc.) Must have hands-on experience and proven successes in Lead Generation for USA Specific to IT Services / Digital Solutions and/or Staffing. MUST own up and deliver impressive client addition targets The position will develop into Front-end sales for USA and Canada, as a Business Development Manager with direct Revenue responsibility and international travels, Relationship Management and Account Mining responsibilities over 2 to 4 years of successful Inside sales performance. Desired Candidate Profile: Should have hands-on experience in lead generation for Digital IT services for the USA market. Ability and experience to get connected at senior management levels of Client Organizations (CEO, CTO, CIO, VP Director levels). Must have good IT/Digital market understanding and connections: Ability to get started quickly Ability to line up discussions for senior management / BD managers Maturity, clarity and experience required with senior connects in organizations from USA Canada Ability and experience of having impressive pitching and positioning at CXO / VP level Must have sound knowledge of Digital Technologies / IT solutions Must have worked in the US region extensively on Digital IT services Candidate must come with high energy enthusiasm and ambitious Good communication skills.