Role: Lead VLSI Recruiter Location: Bangalore Experience: 3-10 years (with at least 4+ years in leading a recruitment team) Roles & Responsibilities Lead the end-to-end recruitment cycle for VLSI, Semiconductor, and Embedded engineering roles. Work closely with hiring managers and leadership to understand workforce planning and technical requirements. Design and implement effective sourcing strategies using Naukri, LinkedIn, employee referrals, and campus hiring. Manage and mentor a team of junior and senior recruiters ; set hiring targets, allocate roles, and monitor performance. Drive technical hiring for specialized domains such as RTL, ASIC, Physical Design, DFT, STA, Verification, FPGA, Analog/Mixed Signal, and Embedded. Develop and maintain a strong talent pipeline for niche VLSI skills and future hiring needs. Handle candidate engagement, offer negotiation, and closures within defined timelines. Maintain hiring metrics (TAT, quality of hire, offer-to-join ratio) and ensure recruitment process efficiency. Ensure compliance with company recruitment policies and data management in ATS (Naukri RMS / Zoho / etc.). Preferred Candidate Profile: Bachelors / Masters degree in HR, Management, or Engineering. 3 – 10 years of recruitment experience, with strong exposure to semiconductor/VLSI hiring . Proven experience in leading recruitment teams and handling multiple stakeholders. Strong knowledge of VLSI domains (RTL, ASIC, DFT, STA, Verification, FPGA, etc.). Excellent sourcing skills (job portals, LinkedIn Recruiter, networking, headhunting). Ability to work in a fast-paced startup environment with strong ownership and accountability. Exceptional communication, negotiation, and relationship management skills. Metrics-driven mindset with experience in using ATS tools and recruitment dashboards .
Ciliconchip Vice President Projects & Services Location: Bangalore Experience: 20+ Years Role Overview The Vice President Projects & Services will lead the end-to-end delivery and customer success functions across high complexity Mixed-Signal Analog IP design and engineering service programs . This role is responsible for driving delivery excellence, operational efficiency, and customer satisfaction across global engagements, with a focus on Power Solutions, UCIe Interfaces, Memory, and Sensor IPs . Key Responsibilities 1. Project & Program Leadership Oversee planning, execution, and delivery of high complexity Mixed-Signal Analog IP development and integration projects across global customer engagements. Establish project management frameworks ensuring scope, cost, and timeline adherence. Drive program reviews, risk assessment, and milestone tracking across all active IP programs. Ensure tight alignment between engineering, operations, and customer stakeholders for smooth execution and delivery. 2. Service Delivery Excellence Develop and implement best practices for analog/mixed-signal design services , covering design, layout, verification, validation, and silicon characterization. Drive resource optimization, delivery metrics, and quality governance across multiple engagements. Manage delivery centers, project leads, and domain experts to ensure consistent, high-quality outcomes. Establish scalable delivery methodologies and engagement models for IP development and customer support. 3. Strategic Leadership Partner with the executive team to define and execute growth strategies for the Projects & Services business unit focused on Mixed-Signal Analog IPs . Identify and drive continuous improvement initiatives in tools, design methodologies, and talent capabilities. Enable customer success through proactive engagement, transparent communication, and on-time delivery. Support business expansion through new service offerings and technology collaborations in the analog/mixed-signal ecosystem. 4. People & Organizational Development Lead and mentor program managers, technical leads, and cross-functional delivery teams across locations. Foster a performance-driven, collaborative culture built on accountability, innovation, and excellence. Partner with HR to design training programs, competency frameworks, and career growth paths for engineering and delivery talent. Build a strong succession and leadership pipeline to sustain long-term organizational growth. 5. Business Operations Own the P&L for the Projects & Services division, ensuring profitability and sustainable growth. Define and monitor utilization, margin goals, and delivery KPIs to drive operational excellence. Collaborate with Sales, Pre-Sales, and Engineering to ensure smooth project transitions from proposal to execution. Implement governance models and reporting structures for visibility, accountability, and decision-making efficiency. Required Qualifications Education: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, or related disciplines . Experience: 20+ years in semiconductor or IP design services , with at least 5 years in senior delivery or program leadership. Proven track record managing complex analog/mixed-signal design projects across global customers. Strong expertise in project governance, resource management, and customer delivery excellence . Demonstrated success in building and scaling delivery organizations in the semiconductor/IP ecosystem. You may mail your resumes at varun@ciliconchip.com
Ciliconchip Chief Technology Officer Experience: 20+ Years Location: Bangalore Role Overview The Chief Technology Officer (CTO) will define and lead the company's technology vision, architecture, and innovation roadmap in Mixed-Signal Analog IP development , with focus areas spanning power management, UCIe interfaces, memory, and sensor technologies . This leadership role will drive R&D excellence, IP innovation, and engineering capability across global design teams. Key Responsibilities 1. Technology Strategy & Vision Define and own the companys Mixed-Signal Analog IP technology roadmap , aligning it with business strategy and market direction. Identify emerging analog and mixed-signal trends (UCIe, chiplet integration, low-power and high-speed analog architectures) that can create competitive differentiation. Establish and nurture strategic partnerships with foundries, EDA vendors, universities, and ecosystem players to strengthen IP innovation. Guide R&D in advanced design methodologies, reusable IP frameworks , and next-generation process readiness. 2. Engineering Leadership Oversee all engineering functions Analog/Mixed-Signal Design, Circuit Verification, Layout, Validation, and Integration . Set technical standards, design quality metrics, and best practices across all IP development programs. Ensure predictable execution and delivery of high-performance, low-power Mixed-Signal IPs . Drive PPA (Power, Performance, Area) optimization, design reusability , and automation in design and verification flows. 3. IP Development & Productization Drive first-silicon success and productization of advanced Mixed-Signal IPs across power, UCIe, memory, and sensor domains. Architect reusable IP cores, subsystems, and platforms to accelerate future product and customer integration cycles. Oversee technology evaluation for EDA tools, analog/mixed-signal design kits (PDKs), libraries, and process migrations. Review IP specifications to ensure feasibility, scalability, manufacturability, and compliance with integration standards. 4. Innovation & R&D Lead advanced R&D initiatives in emerging domains such as low-power architectures, high-speed interfaces, and AI-assisted design automation. Sponsor internal innovation programs and IP filings , fostering a culture of technical excellence and experimentation. Drive internal architecture forums, design councils , and cross-functional technical reviews to accelerate learning and innovation. 5. Talent Development & Organization Building Mentor and develop senior technical leaders including Directors, Fellows, and Principal Engineers across analog, mixed-signal, and IP disciplines. Foster a high-performance, innovation-driven culture emphasizing accountability and technical depth. Partner with HR to define technical career ladders, learning frameworks , and university collaboration programs to build a sustainable talent pipeline. 6. Customer & Ecosystem Engagement Serve as the companys technical ambassador with customers, partners, and industry forums. Translate customer requirements into scalable, IP-level technical solutions and roadmaps. Engage in strategic business reviews, co-development initiatives, and customer engagements to ensure alignment with market needs. Represent the company at industry conferences and technology consortia , showcasing IP leadership and innovation. 7. Governance & Risk Management Ensure IP protection, design security, and compliance across all programs. Define and enforce technical governance frameworks , including design reviews and quality audits. Mitigate risks through robust validation, simulation coverage, and silicon correlation strategies . Qualifications Minimum Requirements B.E./B.Tech/M.Tech/Ph.D. in Electrical, Electronics, or Microelectronics Engineering . 20+ years of experience in Analog/Mixed-Signal IP design and development , with at least 10 years in senior leadership roles. Proven track record of leading large, multi-disciplinary engineering teams across global sites. Deep hands-on expertise in power management circuits, high-speed interfaces (UCIe), memory IPs, and sensor integration . Strong understanding of EDA tool chains, design flows, process technologies , and silicon manufacturing. Demonstrated success in building world-class engineering teams and delivering IP innovation at scale. You may mail your resumes at varun@ciliconchip.com
GM / Vice President Product Development Location: Bangalore Experience: 20+ years Role Overview The GM / VP of Product Development will lead the end-to-end design, development, and delivery of Mixed-Signal Analog IPs , with a focus on power solutions, UCIe, memory interfaces, and sensor technologies . This leadership role requires deep technical acumen in analog and mixed-signal domains, combined with strategic vision to drive innovation, scalability, and business growth. Key Responsibilities Strategic Leadership Define and articulate the Mixed-Signal Analog IP product development strategy , aligning it with business goals, technology roadmaps, and market trends. Drive innovation and differentiation across power management, interface, and sensor IP portfolios . Evaluate emerging technologies and ecosystem trends (such as UCIe, chiplet architectures, and low-power design) to identify new opportunities for IP development. Collaborate with executive leadership to set long-term objectives and investment priorities for the Mixed-Signal IP portfolio . Product Development & Engineering Execution Lead cross-functional teams in architecture, circuit design, verification, validation, and system integration to deliver high-quality Mixed-Signal Analog IPs . Oversee the complete IP lifecycle, from concept, design, and simulation to validation, silicon characterization, and product qualification. Establish robust engineering processes emphasizing first-time-right silicon , design reuse, and power-performance optimization. Ensure IP design compliance with performance, reliability, manufacturability, and integration requirements. Collaborate with foundry and packaging partners to optimize yield, quality, and production scalability . Team Leadership & Organizational Development Build, mentor, and lead a high-performing team of analog/mixed-signal design engineers, product managers, and validation experts . Create a culture of technical excellence, collaboration, and innovation across design and development teams. Attract and develop top talent; establish clear competency frameworks and career growth paths. Lead multi-geo teams effectively, driving collaboration between design centers, ecosystem partners, and key customers . Product Strategy & Market Alignment Translate customer requirements and market insights into actionable IP specifications and technology roadmaps. Partner with business, sales, and customer engineering teams to define IP positioning, go-to-market strategy , and customer engagement models. Prioritize IP development initiatives based on ROI, technical differentiation, and market demand . Engage with strategic customers and partners to ensure roadmap alignment with system-level integration needs. Operational Excellence & Governance Define and monitor KPIs for IP quality, design efficiency, schedule adherence , and innovation metrics. Implement best practices in Agile/Lean development and design governance for IP programs. Drive continuous improvement through design reviews, silicon feedback loops, and data-driven decision-making . Represent the Product Development organization in executive reviews and board-level discussions . Required Qualifications Bachelors or Masters degree in Electronics, Electrical Engineering, or related field ; Ph.D. preferred. 20+ years of progressive experience in analog/mixed-signal IP development , with at least 10+ years in leadership roles driving IP design, validation, and delivery. Proven success in managing large-scale design teams and cross-functional engineering programs in leading semiconductor or IP companies. Deep technical expertise in analog, power management, high-speed interfaces (UCIe), memory subsystems, and sensor integration . Strong understanding of semiconductor IP lifecycle , EDA tools, and silicon manufacturing flows. Demonstrated ability to build and scale world-class engineering teams and deliver complex IP portfolios to market. You may also mail your resumes to varun@ciliconchip.com
Role:Vice President – Projects & Services Location: Bangalore Experience: 20+ Years Role Overview: The Vice President – Projects & Services will lead the end-to-end delivery and customer success functions across high complexity Mixed-Signal Analog IP design and engineering service programs. This role is responsible for driving delivery excellence, operational efficiency, and customer satisfaction across global engagements, with a focus on Power Solutions, UCIe Interfaces, Memory, and Sensor IPs. Key Responsibilities: 1. Project & Program Leadership ● Oversee planning, execution, and delivery of high complexity Mixed-Signal Analog IP development and integration projects across global customer engagements. ● Establish project management frameworks ensuring scope, cost, and timeline adherence. ● Drive program reviews, risk assessment, and milestone tracking across all active IP programs. ● Ensure tight alignment between engineering, operations, and customer stakeholders for smooth execution and delivery. 2. Service Delivery Excellence ● Develop and implement best practices for analog/mixed-signal design services, covering design, layout, verification, validation, and silicon characterization. ● Drive resource optimization, delivery metrics, and quality governance across multiple engagements. ● Manage delivery centers, project leads, and domain experts to ensure consistent, high-quality outcomes. ● Establish scalable delivery methodologies and engagement models for IP development and customer support. 3. Strategic Leadership ● Partner with the executive team to define and execute growth strategies for the Projects & Services business unit focused on Mixed-Signal Analog IPs. ● Identify and drive continuous improvement initiatives in tools, design methodologies, and talent capabilities. ● Enable customer success through proactive engagement, transparent communication, and on-time delivery. ● Support business expansion through new service offerings and technology collaborations in the analog/mixed-signal ecosystem. 4. People & Organizational Development ● Lead and mentor program managers, technical leads, and cross-functional delivery teams across locations. ● Foster a performance-driven, collaborative culture built on accountability, innovation, and excellence. ● Partner with HR to design training programs, competency frameworks, and career growth paths for engineering and delivery talent. ● Build a strong succession and leadership pipeline to sustain long-term organizational growth. 5. Business Operations ● Own the P&L for the Projects & Services division, ensuring profitability and sustainable growth. ● Define and monitor utilization, margin goals, and delivery KPIs to drive operational excellence. ● Collaborate with Sales, Pre-Sales, and Engineering to ensure smooth project transitions from proposal to execution. ● Implement governance models and reporting structures for visibility, accountability, and decision-making efficiency. Required Qualifications: ● Education: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, or related disciplines. ● Experience: 20+ years in semiconductor or IP design services, with at least 5 years in senior delivery or program leadership. ● Proven track record managing complex analog/mixed-signal design projects across global customers. ● Strong expertise in project governance, resource management, and customer delivery excellence. ● Demonstrated success in building and scaling delivery organizations in the semiconductor/IP ecosystem. Please reach out to varun@ciliconchip.com
Role: GM / Vice President – Product Development Location: Bangalore Experience: 20+ years Role Overview: The GM / VP of Product Development will lead the end-to-end design, development, and delivery of Mixed-Signal Analog IPs, with a focus on power solutions, UCIe, memory interfaces, and sensor technologies. This leadership role requires deep technical acumen in analog and mixed-signal domains, combined with strategic vision to drive innovation, scalability, and business growth. Key Responsibilities: Strategic Leadership ● Define and articulate the Mixed-Signal Analog IP product development strategy, aligning it with business goals, technology roadmaps, and market trends. ● Drive innovation and differentiation across power management, interface, and sensor IP portfolios. ● Evaluate emerging technologies and ecosystem trends (such as UCIe, chiplet architectures, and low-power design) to identify new opportunities for IP development. ● Collaborate with executive leadership to set long-term objectives and investment priorities for the Mixed-Signal IP portfolio. Product Development & Engineering Execution ● Lead cross-functional teams in architecture, circuit design, verification, validation, and system integration to deliver high-quality Mixed-Signal Analog IPs. ● Oversee the complete IP lifecycle, from concept, design, and simulation to validation, silicon characterization, and product qualification. ● Establish robust engineering processes emphasizing first-time-right silicon, design reuse, and power-performance optimization. ● Ensure IP design compliance with performance, reliability, manufacturability, and integration requirements. ● Collaborate with foundry and packaging partners to optimize yield, quality, and production scalability. Team Leadership & Organizational Development: ● Build, mentor, and lead a high-performing team of analog/mixed-signal design engineers, product managers, and validation experts. ● Create a culture of technical excellence, collaboration, and innovation across design and development teams. ● Attract and develop top talent; establish clear competency frameworks and career growth paths. ● Lead multi-geo teams effectively, driving collaboration between design centers, ecosystem partners, and key customers. Product Strategy & Market Alignment ● Translate customer requirements and market insights into actionable IP specifications and technology roadmaps. ● Partner with business, sales, and customer engineering teams to define IP positioning, go-to-market strategy, and customer engagement models. ● Prioritize IP development initiatives based on ROI, technical differentiation, and market demand. ● Engage with strategic customers and partners to ensure roadmap alignment with system-level integration needs. Operational Excellence & Governance ● Define and monitor KPIs for IP quality, design efficiency, schedule adherence, and innovation metrics. ● Implement best practices in Agile/Lean development and design governance for IP programs. ● Drive continuous improvement through design reviews, silicon feedback loops, and data-driven decision-making. ● Represent the Product Development organization in executive reviews and board-level discussions. Required Qualifications ● Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or related field; Ph.D. preferred. ● 20+ years of progressive experience in analog/mixed-signal IP development, with at least 10+ years in leadership roles driving IP design, validation, and delivery. ● Proven success in managing large-scale design teams and cross-functional engineering programs in leading semiconductor or IP companies. ● Deep technical expertise in analog, power management, high-speed interfaces (UCIe), memory subsystems, and sensor integration. ● Strong understanding of semiconductor IP lifecycle, EDA tools, and silicon manufacturing flows. ● Demonstrated ability to build and scale world-class engineering teams and deliver complex IP portfolios to market. Please reach out to varun@ciliconchip.com
Ciliconchip Senior Manager / HR – Semiconductor / VLSI Role Overview We are seeking an experienced Human Resources professional to partner with our semiconductor design and engineering teams, driving strategic HR initiatives that enable business growth, innovation, and organizational excellence. This role combines strategic partnership, operational execution, and employee engagement expertise to build a high- performance culture aligned with business objectives. Key Responsibilities Strategic HR Partnership ● Partner with BU leaders to develop and execute people strategies that support business priorities and organizational growth. ● Provide data-driven insights and recommendations to influence workforce planning, talent development, and organizational effectiveness. ● Act as a trusted advisor to leadership, ensuring alignment between HR strategy and business outcomes. Talent Management & Development ● Drive talent reviews, succession planning, and capability development for engineering and technical teams. ● Identify skill gaps and partner with Learning & Development to design targeted programs for engineers, project leads, and emerging leaders. ● Facilitate career pathing and progression frameworks aligned with technical career ladders. Performance & Rewards ● Lead performance management processes including goal setting, feedback, and appraisals. ● Partner with Compensation & Benefits teams to ensure market-competitive and equitable reward programs. ● Support recognition and retention programs tailored to high-performing engineering talent. Employee Engagement & Culture ● Build an inclusive and high-engagement culture through leadership connects, surveys, and action planning. ● Serve as an employee advocate, ensuring transparency, trust, and consistent policy interpretation. ● Drive diversity, equity, and inclusion initiatives across engineering and support functions. HR Operations & Compliance ● Ensure compliance with local labour laws and company policies, maintaining audit-ready documentation. ● Oversee HR operations including onboarding, transfers, exits, and HRMS data accuracy. ● Partner with global HR teams to align India processes with enterprise HR frameworks. Management & Communication ● Support organizational design, restructuring, and transformation initiatives with clear communication and smooth execution. ● Lead change management programs to build adaptability and readiness across teams. Qualifications & Experience ● Education: Master’s Degree in Human Resources, Business Administration, or related field. ● Experience: 12–16 years of HR experience, preferably in Semiconductor, VLSI industry. ● Proven experience as an HR Business Partner or Senior HR Manager supporting engineering or product development teams. ● Strong understanding of India labour laws, compliance, and HR best practices. ● Excellent interpersonal, consulting, and stakeholder management skills with the ability to influence at all levels. ● Analytical mindset with proficiency in HR analytics and reporting tools. ● Demonstrated success in driving change, talent initiatives, and employee engagement in dynamic environments.
Ciliconchip Talent Acquisition Head - Job Description The Head of Talent Acquisition will lead the organization’s end-to-end talent acquisition function, driving strategy, innovation, and execution across all hiring verticals. Work closely with executive leadership, HR business partners, and business heads to anticipate workforce needs, establish robust hiring frameworks, and elevate the company’s employer brand in the market. Key Responsibilities 1. Strategic Leadership & Talent Planning Develop and execute a semiconductor-specific talent acquisition strategy aligned with business objectives in VLSI design, physical design, verification, DFT, and analog/mixed-signal domains. Partner with CXOs, Design Heads, and Program Managers to forecast hiring demand across design centers and delivery programs. Build proactive pipelines for niche and emerging skills (e.g., UCIe, AMS IPs, RTL design, emulation, validation). Represent TA in HR leadership forums, ensuring alignment of hiring strategy with the organization’s technology and growth roadmap. 2. Team Leadership & Capability Development Lead and mentor a geographically distributed TA team specialized in semiconductor and engineering hiring. Establish domain-specific KPIs (time-to-fill, design talent conversion rates, campus-to- hire ratios). Build recruiter capability in VLSI hiring through structured training on technology stacks, job family structures, and skill taxonomies. Foster a culture of agility, collaboration, and precision execution within the TA function. 3. Recruitment Excellence & Process Optimization Drive the full recruitment lifecycle — from semiconductor talent mapping and sourcing to selection, offer, and onboarding. Implement best-in-class ATS/CRM systems integrated with engineering skill-based taxonomies. Standardize interview structures for technical evaluation (design challenges, coding, schematic reviews). Ensure compliance with IP confidentiality, export control, and data-protection regulations relevant to semiconductor hiring. Champion diversity hiring across engineering roles (women in hardware, campus inclusivity programs). 4. Employer Branding & Talent Marketing Position the company as a leading semiconductor design employer through branding campaigns, university collaborations, and thought-leadership events. Build partnerships with IITs, NITs, and Tier-1 VLSI campuses, and sponsor hackathons, chip design contests, and industry conferences (e.g., DVCon, VLSID). Use digital platforms (LinkedIn, GitHub, IEEE, Semicon India forums) to enhance brand visibility and engage with passive engineering talent. Measure and improve candidate experience and brand perception across all talent touchpoints. 5. Stakeholder & Vendor Management Act as a strategic advisor to business heads on semiconductor talent availability, compensation trends, and skill gaps. Manage partnerships with VLSI recruitment firms, contract staffing agencies, and university placement cells. Negotiate service contracts and SLAs with niche semiconductor hiring partners to ensure agility and ROI. 6. Capability Development & Collaboration Partner with Learning & Development and Technical Leadership teams to identify hiring- related capability gaps in emerging semiconductor technologies. Lead recruiter certification programs on semiconductor fundamentals, design flow, and talent analytics. Align talent acquisition insights with workforce planning for design centers, building a sustainable engineering leadership pipeline. Key Performance Indicators (KPIs) Fulfillment rate for critical/niche semiconductor roles. Time-to-hire, quality-of-hire, and offer-to-join ratio for design and verification engineers. Hiring manager and candidate satisfaction. Campus-to-hire conversion ratio and diversity metrics. Employer Brand Index in semiconductor talent market. Recruiter technical capability improvement metrics. Required Qualifications Education: Master’s degree in Human Resources, Business Administration, or related field. Experience: Minimum 14 years of progressive TA experience, with at least 5 years in semiconductor/VLSI hiring leadership. Proven success in scaling engineering hiring operations in high-growth or technology- driven environments. Strong expertise in workforce planning for SoC, ASIC, and analog/mixed-signal design organizations. Experience with TA analytics, ATS systems, and semiconductor industry benchmarks. Preferred Skills Deep understanding of semiconductor design flow and talent ecosystem. Excellent stakeholder management with global delivery and R&D teams. Experience integrating TA and capability development initiatives. Strategic mindset with ability to translate business goals into talent pipelines. Strong analytical, communication, and influencing skills.
Ciliconchip Talent Acquisition Head - Job Description The Head of Talent Acquisition will lead the organization's end-to-end talent acquisition function, driving strategy, innovation, and execution across all hiring verticals. Work closely with executive leadership, HR business partners, and business heads to anticipate workforce needs, establish robust hiring frameworks, and elevate the company's employer brand in the market. Key Responsibilities 1. Strategic Leadership & Talent Planning ? Develop and execute a semiconductor-specific talent acquisition strategy aligned with business objectives in VLSI design, physical design, verification, DFT, and analog/mixed-signal domains. ? Partner with CXOs, Design Heads, and Program Managers to forecast hiring demand across design centers and delivery programs. ? Build proactive pipelines for niche and emerging skills (e.g., UCIe, AMS IPs, RTL design, emulation, validation). ? Represent TA in HR leadership forums, ensuring alignment of hiring strategy with the organization's technology and growth roadmap. 2. Team Leadership & Capability Development ? Lead and mentor a geographically distributed TA team specialized in semiconductor and engineering hiring. ? Establish domain-specific KPIs (time-to-fill, design talent conversion rates, campus-to- hire ratios). ? Build recruiter capability in VLSI hiring through structured training on technology stacks, job family structures, and skill taxonomies. ? Foster a culture of agility, collaboration, and precision execution within the TA function. 3. Recruitment Excellence & Process Optimization ? Drive the full recruitment lifecycle from semiconductor talent mapping and sourcing to selection, offer, and onboarding. ? Implement best-in-class ATS/CRM systems integrated with engineering skill-based taxonomies. ? Standardize interview structures for technical evaluation (design challenges, coding, schematic reviews). ? Ensure compliance with IP confidentiality, export control, and data-protection regulations relevant to semiconductor hiring. ? Champion diversity hiring across engineering roles (women in hardware, campus inclusivity programs). 4. Employer Branding & Talent Marketing ? Position the company as a leading semiconductor design employer through branding campaigns, university collaborations, and thought-leadership events. ? Build partnerships with IITs, NITs, and Tier-1 VLSI campuses, and sponsor hackathons, chip design contests, and industry conferences (e.g., DVCon, VLSID). ? Use digital platforms (LinkedIn, GitHub, IEEE, Semicon India forums) to enhance brand visibility and engage with passive engineering talent. ? Measure and improve candidate experience and brand perception across all talent touchpoints. 5. Stakeholder & Vendor Management ? Act as a strategic advisor to business heads on semiconductor talent availability, compensation trends, and skill gaps. ? Manage partnerships with VLSI recruitment firms, contract staffing agencies, and university placement cells. ? Negotiate service contracts and SLAs with niche semiconductor hiring partners to ensure agility and ROI. 6. Capability Development & Collaboration ? Partner with Learning & Development and Technical Leadership teams to identify hiring- related capability gaps in emerging semiconductor technologies. ? Lead recruiter certification programs on semiconductor fundamentals, design flow, and talent analytics. ? Align talent acquisition insights with workforce planning for design centers, building a sustainable engineering leadership pipeline. Key Performance Indicators (KPIs) ? Fulfillment rate for critical/niche semiconductor roles. ? Time-to-hire, quality-of-hire, and offer-to-join ratio for design and verification engineers. ? Hiring manager and candidate satisfaction. ? Campus-to-hire conversion ratio and diversity metrics. ? Employer Brand Index in semiconductor talent market. ? Recruiter technical capability improvement metrics. Required Qualifications ? Education: Master's degree in Human Resources, Business Administration, or related field. Experience: Minimum 14 years of progressive TA experience, with at least 5 years in semiconductor/VLSI hiring leadership. ? Proven success in scaling engineering hiring operations in high-growth or technology- driven environments. ? Strong expertise in workforce planning for SoC, ASIC, and analog/mixed-signal design organizations. ? Experience with TA analytics, ATS systems, and semiconductor industry benchmarks. Preferred Skills ? Deep understanding of semiconductor design flow and talent ecosystem. ? Excellent stakeholder management with global delivery and R&D teams. ? Experience integrating TA and capability development initiatives. ? Strategic mindset with ability to translate business goals into talent pipelines. ? Strong analytical, communication, and influencing skills.
As a Senior Manager / HR in the Semiconductor / VLSI industry at Ciliconchip, your role involves partnering with semiconductor design and engineering teams to drive strategic HR initiatives that promote business growth, innovation, and organizational excellence. Your responsibilities will encompass strategic HR partnership, talent management & development, performance & rewards, employee engagement & culture, HR operations & compliance, and management & communication. **Role Overview:** You will play a crucial role in developing and executing people strategies that align with business priorities and foster organizational growth. Providing data-driven insights and recommendations to influence workforce planning, talent development, and organizational effectiveness will be essential. Additionally, you will act as a trusted advisor to leadership, ensuring HR strategy alignment with business outcomes. **Key Responsibilities:** - **Strategic HR Partnership:** - Collaborate with BU leaders to develop and implement people strategies in line with business priorities. - Offer data-driven insights to influence workforce planning, talent development, and organizational effectiveness. - Act as a trusted advisor to leadership to ensure HR strategy alignment with business outcomes. - **Talent Management & Development:** - Conduct talent reviews, succession planning, and capability development for engineering and technical teams. - Identify skill gaps and collaborate with Learning & Development for designing targeted programs. - Facilitate career pathing and progression frameworks aligned with technical career ladders. - **Performance & Rewards:** - Lead performance management processes like goal setting, feedback, and appraisals. - Collaborate with Compensation & Benefits teams to maintain market-competitive and equitable reward programs. - Support recognition and retention programs tailored to high-performing engineering talent. - **Employee Engagement & Culture:** - Foster an inclusive and high-engagement culture through leadership connects, surveys, and action planning. - Act as an employee advocate, ensuring transparency, trust, and consistent policy interpretation. - Drive diversity, equity, and inclusion initiatives across engineering and support functions. - **HR Operations & Compliance:** - Ensure compliance with local labor laws and company policies, maintaining audit-ready documentation. - Oversee HR operations including onboarding, transfers, exits, and HRMS data accuracy. - Partner with global HR teams to align India processes with enterprise HR frameworks. - **Management & Communication:** - Support organizational design, restructuring, and transformation initiatives with clear communication and smooth execution. - Lead change management programs to enhance adaptability and readiness across teams. **Qualifications & Experience:** - **Education:** Masters Degree in Human Resources, Business Administration, or related field. - **Experience:** 12-16 years of HR experience, preferably in the Semiconductor, VLSI industry. - Proven experience as an HR Business Partner or Senior HR Manager supporting engineering or product development teams. - Strong understanding of India labor laws, compliance, and HR best practices. - Excellent interpersonal, consulting, and stakeholder management skills with the ability to influence at all levels. - Analytical mindset with proficiency in HR analytics and reporting tools. - Demonstrated success in driving change, talent initiatives, and employee engagement in dynamic environments.,
Ciliconchip Circuit is hiring Sales and Business Development head, (08 - 20 years of experience), send your resumes to varun@ciliconchip.com Key Responsibilities: Identify, pursue, and close new business opportunities in the VLSI / Semiconductor design and services domain. Develop and execute sales strategies to achieve revenue and growth targets. Build and maintain long-term relationships with clients, OEMs, and design houses globally. Collaborate with technical and delivery teams to align client needs with company capabilities. Conduct market research to understand industry trends, competitors, and emerging opportunities. Manage the entire sales cycle — from prospecting to negotiation and closure. Represent the company at industry events, conferences, and client meetings. Drive proposal creation, pricing strategies, and client presentations. Track and report sales metrics, forecasts, and performance analysis. Required Skills & Qualifications: Bachelor’s or Master’s degree in Electronics, Electrical, or related Engineering discipline. Years of proven experience in business development, sales, or account management in the VLSI / Semiconductor industry. Strong network of industry contacts across semiconductor design, EDA, and IP service domains. Excellent understanding of ASIC/FPGA Design, Verification, PD, DFT, Analog, and Embedded Systems. Proven ability to generate leads, build pipelines, and close deals. Exceptional communication, negotiation, and presentation skills. Ability to work collaboratively with cross-functional teams. Self-motivated, target-oriented, and adaptable to fast-paced environments.
As a Sales and Business Development Head at Ciliconchip Circuit, your role will be crucial in identifying, pursuing, and closing new business opportunities in the VLSI / Semiconductor design and services domain. You will be responsible for developing and executing sales strategies to achieve revenue and growth targets. Building and maintaining long-term relationships with clients, OEMs, and design houses globally will be essential. Collaboration with technical and delivery teams to align client needs with company capabilities is key. Market research to understand industry trends, competitors, and emerging opportunities will also be part of your responsibilities. Managing the entire sales cycle from prospecting to negotiation and closure is a critical aspect of the role. Furthermore, representing the company at industry events, conferences, and client meetings, as well as driving proposal creation, pricing strategies, and client presentations will be expected. Tracking and reporting sales metrics, forecasts, and performance analysis will also be part of your day-to-day activities. Key Responsibilities: - Identify, pursue, and close new business opportunities in the VLSI / Semiconductor design and services domain. - Develop and execute sales strategies to achieve revenue and growth targets. - Build and maintain long-term relationships with clients, OEMs, and design houses globally. - Collaborate with technical and delivery teams to align client needs with company capabilities. - Conduct market research to understand industry trends, competitors, and emerging opportunities. - Manage the entire sales cycle from prospecting to negotiation and closure. - Represent the company at industry events, conferences, and client meetings. - Drive proposal creation, pricing strategies, and client presentations. - Track and report sales metrics, forecasts, and performance analysis. Qualifications Required: - Bachelors or Masters degree in Electronics, Electrical, or related Engineering discipline. - Years of proven experience in business development, sales, or account management in the VLSI / Semiconductor industry. - Strong network of industry contacts across semiconductor design, EDA, and IP service domains. - Excellent understanding of ASIC/FPGA Design, Verification, PD, DFT, Analog, and Embedded Systems. - Proven ability to generate leads, build pipelines, and close deals. - Exceptional communication, negotiation, and presentation skills. - Ability to work collaboratively with cross-functional teams. - Self-motivated, target-oriented, and adaptable to fast-paced environments.,