Job
Description
You will be expected to independently execute mid-sized customer projects in the field of VLSI Frontend, Backend, or Analog design with minimal supervision. As an individual contributor, you will own a specific task related to RTL Design/Module and provide support and guidance to engineers in various areas such as Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your role will involve anticipating, diagnosing, and resolving problems while coordinating with cross-functional teams as necessary. It is essential to ensure on-time quality delivery that meets the approval of the project manager and the client. Additionally, you will be responsible for automating design tasks flows, writing scripts to generate reports, and proposing innovative ideas to reduce design cycle time and cost, which should be accepted by UST Manager and the client. Your performance will be measured based on the quality of deliverables, timely delivery, reduction in cycle time and cost through innovative approaches, the number of papers published, the number of patents filed, and the number of mandatory trainings attended. You should aim to deliver high-quality work by ensuring zero bugs in the design/circuit design, clean delivery of the design/module for easy integration at the top level, meeting functional specifications/design guidelines without any deviation, and documenting tasks and work performed. Timely delivery is crucial, and you must adhere to project timelines, deliver intermediate tasks to support team progress, and seek help and support if there are delays in task delivery. Continuous skills development is encouraged through participation in training sessions, upskilling in newer technologies, and taking on new areas of project development to enhance your knowledge and deliver results. Teamwork is essential, and you should actively participate, support team members when needed, take on additional tasks in the absence of team members, and assist junior team members in understanding project tasks. Going beyond the call of duty to meet deadlines and maintain quality standards is expected. Innovation and creativity are valued, and you should automate tasks to save design cycle time, participate in technical discussions, training forums, and contribute to white papers. Your skills should include proficiency in languages and programming such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, and Makefile. Experience with EDA tools like Cadence, Synopsys, Mentor tool sets, simulators, and various technical knowledge areas is required. Strong communication, analytical reasoning, problem-solving skills, attention to detail, and the ability to deliver tasks on time are essential. You should be well-versed in EDA tools, have the necessary technical skills, and be willing to learn new skills as required for project execution. Knowledge of project execution in various design areas, understanding design flow and methodologies, and the ability to execute project tasks as per known skills are key. Specific experience in DFT ATPG, Mbist, and SCAN is preferred, along with expertise in SOC or Subsystems designs, DFT methodologies, and standard DFT tools. Familiarity with SoC style DFT architectures, low power design practices, test mode timing constraint development, and analysis will be beneficial. Hands-on experience in ATPG, SCAN, MBIST, JTAG implementation, and knowledge of test compression and ATE debug are valuable assets. Your role will involve utilizing your skills and knowledge to contribute effectively to project success.,
