STA Engineer (Static Timing Analysis)

5 - 9 years

0 Lacs

Posted:1 day ago| Platform: Shine logo

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Work Mode

On-site

Job Type

Full Time

Job Description

As an STA Engineer at ACL Digital in Pune, with over 5 years of experience, your key responsibilities will include: - Performing netlist and constraint sign-in checks and validation - Developing Prime Time constraints at full chip level and ensuring clean up - Applying multimode multi-corner timing knowledge for timing closure at sub HM/block/top level - Achieving top-level timing closure with sign-off STA in MMMC with Xtalk and OCV - Developing top-level ECO implementation strategy for netlist, RTL, and timing level changes - Utilizing scripting experience in Perl/TCL If there are any additional details about the company in the job description, please provide them for a more comprehensive overview.,

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ACL Digital

Information Technology and Services

Palo Alto

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