This position is for Senior Integration Engineer in GLOBALFOUNDRIES India center at Bangalore, supporting 200 and 300mm wafer fabs in US, Singapore, and Germany. The successful candidate will be responsible for developing electrical parametric test programs to support the ramp of multiple technology nodes on GLOBALFOUNDRIES strategic roadmap. This candidate will be critical in leading the development of the test infrastructure within a state-of-the-art automated test floor. Support of multiple technologies and products in a foundry environment will be required.
Your Job
- Provide strategic support of parametric test programs, processes and activities to ensure minimal downtime for the facility, the lowest cost solutions and establishing a world class operation.
- Contribute to the development of short- and long-term test strategies, policies and procedures and support the plans, development and implementation of parametric test engineering activities for high automation, high volume fab.
- This position will drive the development and maintenance of electrical parametric test programs, used for inline monitoring of multiple process technologies. In addition, the position will support the development of automated electrical parametric characterization programs for feedback to the Yield and Process Integration teams.
- Develop and improve yield characterization and data analysis methodologies to determine yield limiters, correlation to in-line defectivity, and electrical parametric signals.
- Drive internal test areas to improve data quality, cost, cycle time, and manufacturing robustness. Provide full engineering support to the manufacturing test areas.
- Candidates will be expected to work closely with process integration, process modules, failure analysis, product and customer engineering organizations to meet all customer technology requirements, and corporate cost and revenue goals
Required Qualifications:
- Masters degree in Electronics, Circuit Design, Electrical Engineering, or related technical field of study
- A minimum of 1 year of experience in semiconductor, product yield, test engineering, circuit design, process integration, or process engineering experience.
- Parametric ATE proficiency preferably with Agilent 4082 and/or P9000 test systems is highly advantageous
- Fundamental understanding of electrical circuit design, test, and the effects of electrical characteristics on product yield and performance.
- Demonstrated experience with programming languages C/C++ and Unix.
- Demonstrated knowledge of semiconductor processing and processing integration, test chips, and test structures for yield limiter determination and improvement, and electrical parametric correlations to product yield.
- Demonstrated experience in digital CMOS or analog circuit or test structure design, characterization, test/debug, yield enhancement and/or product engineering
- Experience with manufacturing test in a high-volume foundry with advanced technology preferable.
- Demonstrated strong interpersonal skills and ability to work effectively with all levels of a wafer Fab organization.
- Experience with product validation and characterization is advantageous