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Software Engineer

Software Engineer

Infinite

1 - 2 years

3 - 4 Lacs

Chennai

Posted:2 weeks ago| Platform:

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Skills Required

Telecom Automation VHDL Simulation Aerospace FPGA Verilog Perl System verilog FPGA design

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job title: FPGA Design Engineer (Telecom/Aerospace)
Organization Name: NEC Corporation of India Ltd.
Reporting Relationship: Reporting to Project Manager
Location: Chennai/Hybrid
Experience 1 -2 years
Job Summary:
We looking for an experienced and highly talented FPGA design engineer with strong telecom and Aerospace expertise at NEC Mobile Network Excellence Center (NMEC), Chennai

Scope of work

Implementing FPGA code on the target hardware & testing with other system components and software
RTL Design, Implementation, Testing, Integration and delivery of FPGA based hardware systems for Telecom and Aerospace Applications
Involve in R&D activities demonstrating Proof of Concept in various technologies for aerospace related design techniques.

Qualifications BE/B.Tech/M.E/M.Tech or its Equivalent

Experience 1 -2 years

Domain Expertise

Proficient in FPGA design flows using Xilinx tools, including compilation, simulation, synthesis, debugging, performance optimization, and implementation of advanced features.
Strong knowledge of hardware description languages such as Verilog, VHDL, and System Verilog.
Skilled in developing verification environments using self-checking testbenches, Bus Functional Models (BFMs), checkers/monitors, and scoreboards in VHDL/Verilog.
Familiarity with designing common control interfaces such as AMBA AXI, UART, SPI, I C, DDR, Ethernet, and USB.
Hands-on experience with hardware measurement and debugging tools including oscilloscopes, signal analyzers, and JTAG emulators.

Good to Have

Experience integrating Soft IP or Hard IP like GTX/GTH transceivers, MAC, DMA controller, PCIe Gen3, CPRI, JESD, or FFT IP cores
Proficiency in scripting languages for automation, including Perl, TCL, or Python.
Exposure to standard FPGA hardware bring-up procedures and testing methodologies.
Experience in linting, static timing analysis, equivalence checking, and clock domain crossing (CDC) verification.

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