Silicon Validation Engineer, HBM, Google Cloud

As a candidate for this position, you should hold a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or possess equivalent practical experience. Additionally, you should have at least 5 years of experience in High Bandwidth Memory/Double Data Rate (HBM/DDR) technology. Your responsibilities will include silicon bringup, functional validation, characterizing, and qualification, as well as working with board schematics, layout, and debug methodologies utilizing lab equipment. Preferred qualifications for this role include experience in hardware emulation with hardware/software integration, proficiency in coding languages such as Python for automation development, and experience in Register-Transfer Level (RTL) design, verification, or emulation. Knowledge of SoC architecture, boot flows, and HBM/DDR standards will be advantageous. In this role, you will contribute to shaping the future of AI/ML hardware acceleration by working on cutting-edge TPU (Tensor Processing Unit) technology that powers Google's AI/ML applications. You will be part of a team dedicated to developing custom silicon solutions for Google's TPUs, with a focus on design and verification expertise related to TPU architecture and AI/ML-driven systems. Your primary responsibility will be the post-silicon validation of Cloud Tensor Processing Unit (TPU) projects. This will involve creating test plans and content for subsystem testing, verifying content on pre-silicon platforms, executing tests on post-silicon platforms, and debugging issues. Collaboration with engineers from various teams will be essential in validating functional, power, performance, and electrical characteristics of the Cloud TPU silicon to ensure high-quality designs for next-generation data center accelerators. The ML, Systems, & Cloud AI (MSCA) organization at Google is involved in designing, implementing, and managing hardware, software, machine learning, and systems infrastructure for Google services and Google Cloud. Your work will impact millions of users worldwide by prioritizing security, efficiency, and reliability in developing TPUs and running a global network. Your responsibilities will include developing and executing tests for memory controller High Bandwidth Memory (HBM) post-silicon validation, driving debugging efforts, ensuring validation coverage, and assisting in pre-silicon integration and validation on hardware emulators.,