Senior/Lead - Design Verification Engineer - Hyd/Bang

Greetings from Mirafra Technologies!!

We are looking for Leads and Seniors

Please share resume to swarnamanjari@mirafra.com

Exp Min 4 to 15 yrs

Opportunities to work below locations

Hyderabad - Multiple Clients

Bangalore - Multiple Clients

Ahmedabad

Please share the below details

Total Exp:

Cu Ctc:

Exp CTC:

Notice Period:

Current location:

Preferred Locations:

JD

·       Working experience with any of the protocols like AXI/GLS/VIP/Memory/ARM/IP/SoC/PCIE/CXL/I2C/SPI/I3C/

AMBA Protocols

·       Good understanding of ASIC design flow

·       Familiarity with System Verilog and UVM implementation

·       Experience of setting up UVM test bench from scratch and hands on experience on developing

UVM,Assertion/TB

About Mirafra:

Mirafra is an exceptional employer that has received numerous awards in recent years. These accolades include Qualcomm's highly regarded "Best HWE Services Company" for 2020 and the Qualcomm "Zenith Award" in 2018, as well as SiliconIndia's "Best Company to Work For - 2016" and "Most Promising Design Services Provider - 2018." Additionally, we take pride in our engineers' regular receipt of technical performance awards from various customers.