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Senior Principal Verification Engineer

Senior Principal Verification Engineer

Cadence Design Systems

3 - 5 years

3 - 5 Lacs

Noida Uttar Pradesh India

Posted:2 weeks ago| Platform: Foundit logo

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Skills Required

RTL Emulators Automotive

Work Mode

On-site

Job Type

Full Time

Job Description

We are looking for a candidate with excellent communication skills and ability to ramp up on new technologies quickly and independently. This an excellent opportunity to work in a supportive and friendly work environment, where we are vested in each other s success, and are passionate about technology and innovation. Qualifications: BE/BTech/ME/MS/MTech Job Responsibilities: Experience: 15+yrs Candidate must be able to generate RTL/handle scalable designs up to 48 billion Gates. Should be able to modify/update the designs to stress Flip-Flops/Wires/Gates/Input Outputs. Should be able use various available scalable compile/Runtime flows for large scalable designs. Should be able to profile and identify the slow performance areas and work with R&D on enhancements. Should be proficient in Verilog/ System-Verilog, scripting and exposure to Emulation platform is a must.

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