Senior Analog Layout Leads/Architects

Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Leads/Architects with 7-15 years of experience in lower FINFET technology nodes, preferably TSMC 5nm, to join our growing team in Hyderabad. We prefer candidates with a notice period of 30 days or less. As a Senior Analog Layout Lead/Architect, you will be responsible for contributing to cutting-edge analog layout design. You should have expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. A solid understanding of how layout impacts circuit performance, such as speed and area, is essential. You should be able to implement layouts that meet tight design constraints while delivering high quality results. Hands-on experience with CADENCE/SYNOPSYS layout tools and flows is required, and familiarity with scripting languages like PERL/SKILL is a plus. Strong communication skills are necessary as you will be working with cross-functional teams. If you are interested in this opportunity or know someone who would be suitable, please send your updated resume to maruthiprasad.e@eximietas.design. Referrals are highly appreciated. We look forward to connecting with talented engineers who are passionate about pushing the boundaries of analog layout design! Maruthhi Naidu Talent Associate - VLSI Manager Eximietas Design - Visakhapatnam maruthiprasad.e@eximietas.design +91 8088969910.,