RTL(Power) Design Engineer/DSP -Sr Staff Engineer/Manager

Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:Creating power spec for Qualcomm DSP IPs based on the design specPower intent development using UPF for DSP IPs based on power specPower intent validation at RTL level , Gate level (synthesis , PD ) using CLPFixing power intent based on PA DV feedback for any issue related to power intentDebugging issues related to MV cell insertion during synthesis and modifying UPF accordinglyDynamic and Leakage power projection of DSP IPs during starting of the projectDynamic and Leakage power no. generation using PTPX and tracking the same at different stages of implementation flowHighlighting issues related to dynamic and leakage power mismatch compared to the target and working with Synthesis and PD teams to fix the issuesWorking with cross function teams (SOC, Sub System etc) for smooth handoff of power intent and Dynamic & leakage power no. at different stages of project executionMinimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.ApplicantsQualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here.