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Principal Verification Engineer

Principal Verification Engineer

Synopsys

15 - 20 years

50 - 60 Lacs

Bengaluru

Posted:16 hours ago| Platform:

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Skills Required

C++ ASIC Coding USB Ethernet VMM Healthcare Perl Test cases Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

You Are:

A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores. You are experienced in handling complex protocols and thrive in a collaborative international environment. With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM). You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions. You are a proactive team player with excellent communication and problem-solving skills, ready to contribute to cutting-edge projects in AI/machine learning, automotive, and server farm applications.

What You ll Be Doing:

Making architecture decisions on test bench design.
Writing verification plans and specifications.
Implementing test bench infrastructure and writing test cases.
Utilizing a coverage-driven methodology.
Providing technical leadership and guidance to the team.
Collaborating with architects, designers, and other verification team members across multiple sites worldwide.

The Impact You Will Have:

Ensuring the reliability and performance of IP Cores used in critical applications.
Driving innovation in verification methodologies and solutions.
Contributing to the development of industry-leading technologies in AI, automotive, and server farms.
Enhancing productivity and throughput through effective verification strategies.
Maintaining high standards of quality and functionality in IP verification.
Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement.

What You ll Need:

Extensive knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI.
Hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM.
Proficiency in SystemVerilog (SV), UVM, and object-oriented coding and verification.
Ability to provide innovative verification solutions for enhanced productivity and performance.
Experience with scripting languages like C/C++, TCL, Perl, Python is an added advantage.
Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage

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Principal Verification Engineer