Physical Design Engineer, Senior Lead

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. Key Responsibilities: - PNR implementation for Qualcomm SoC's - Hands-on experience on Floorplanning, PNR, and STA flows - Knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc - Understanding of signoff domains LEC/CLP/PDN knowledge, etc - Proficiency in Unix/Linux Perl/TCL fundamentals/scripting Principal Duties and Responsibilities: - Complete ownership of PNR implementation tasks such as Floorplanning, Placement, CTS, post_route, etc on the latest nodes - Mandatory signoff knowledge including STA, Power analysis, FV, low power verification, PV, etc - Ability to quickly learn, with good analytical and problem-solving skills Qualifications: - 6+ years of Hardware Engineering experience or related work experience - 5+ years of experience with PNR flow in the latest tech nodes (e.g., 4nm/5nm/7nm/10nm) (Note: No additional details of the company were mentioned in the job description.),