Memory Design Engineer

Circuit design, simulation, and characterization of full custom circuits

Functional simulations and statistical analysis

Sign off and release the memory IPs on dedicated IP validation test chips

Support Silicon bring-up and characterization

Participate in implementation & design/layout reviews

Contribute with innovative ideas for addressing design problems

Work closely and collaborate with IP design and layout teams

Required Qualifications:

Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 10-12 years of relevant experience

Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.)

Experience in NVM Memory(eFlash/SRAM/eNVM design)) designs

Experience in analog circuits Charge pumps, regulators, low voltage analog circuits, sense amplifier

Good understanding and analysis of READ/PROGRAM/ERASE simulations and analysis

General analog mixed-signal design concepts is desirable

Circuit design, Reliability analysis, Statistical analysis of circuits

Must have good technical verbal and written communication skills and ability to work with cross functional teams

Preferred Qualifications:

Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable

Hands on knowledge of state-of-the-art memory or analog design flows

Programming experience applicable to design flow automation tasks

Dedication and the capability to work within a very dynamic interdisciplinary environment

Knowledge of 45/32/28nm and below technology nodes is an advantage.

Ability to communicate as well as work efficiently in an international multi-disciplinary environment.

Exceptional Spoken and Written Proficiency in English

Strong analytical and problem-solving skills. Role & responsibilities

Preferred candidate profile