39 Sram Jobs

As a Semiconductor Design Engineer_3_4861 based in Hyderabad, your role involves providing verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Your key responsibilities will include: - Developing test cases/Stimulus to enhance functional coverage for all DRAM and emerging memory architectures and features. - Creating and maintaining test benches and test vectors using simulation tools, and running regressions for coverage analysis and improvements. - Collaborating with international colleagues to develop new verification flows for addressing challenges in DRAM and emerging memory design. - Participating in the development of verifica...

Job Title: Semiconductor Design Engineer 3_INR Location: Hyderabad Work Mode: Work from office Description As a Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young and dynamic design team capable of verifying complete products using state of the art memory technologies. You will need to have the ability to evaluate full chip and/or block level functionality and provide solutions to help the timely delivery of a functionally correct design. Unique Opportunities Complete ownership of verification and end to end analysis of complex full chip gate level custom designs with advanced low power and power management technologies spread across multiple ...

Tata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group specializing in manufacturing precision components. As a wholly owned subsidiary of Tata Sons Pvt. Ltd., Tata Electronics is dedicated to establishing India's first AI-enabled state-of-the-art Semiconductor Foundry. This groundbreaking facility will be responsible for producing chips for various applications such as power management IC, display drivers, microcontrollers (MCU), and high-performance computing logic, catering to the increasing demand in markets like automotive, computing, data storage, wireless communications, and artificial intelligence. Responsibilities: - Manage Device Engineering tasks for the...

As the leader in implementing the architecture and design of memory technologies at Ceremorphic AI hardware, your role will involve combining knowledge across various domains such as AI, compilers, computer architecture, analog circuits, and memories. Your responsibilities will include: - Leading the implementation of memory technologies like SRAM, Register Files, ROM generators, etc. - Demonstrating fundamental know-how of bit cell and its characteristics including SNM, WM, Cell current, Standby current, data retention, etc. - Showcasing expertise in process variability and circuit reliability issues affecting power, speed, area, and yield - Having a strong understanding of custom circuit d...

You will be part of a dynamic and motivated team, collaborating with Systems, Design, DFT, Mixed Signal, and other local/remote teams to address verification challenges related to IPs, SubSystems, and overall systems. Your role will involve utilizing advanced verification languages and methodologies to achieve first pass success of complex IPs. - Evaluate and implement evolving verification methodologies for handling complex IP/SubSystem designs within tight schedules - Ensure quality adherence throughout all project stages, analyzing existing processes and implementing improvements for Zero Defect IPs/SubSystems - Contribute to technological innovations for self and team development - Work ...

You will define and implement robust mixed-signal verification methodologies. You will conduct thorough verification of Analog Mixed-Signal designs, demonstrating a good understanding of analog concepts and circuits. Utilize industry-standard HVL-based methodologies such as SV/UVM/Verilog for effective verification. You should have experience with Signal Integrity Modeling, including SV Real/Wreal/RNM Modeling and SPICE models. Verify critical components such as multiphase regulator, LDO, Switching regulators, Filters, ADCs, DACs, and Power circuitry. It would be beneficial to have an understanding of PLL, LDO, charge pumps, and any other analog IP's. Experience in DRAM, SRAM, other memory-r...

Role Overview: You will contribute towards Memory Design Validation of SRAM, Multi-Ports, Register File, TCAM, and ROM memory compilers as well as custom macros in 3nm and other cutting edge process technologies. Key Responsibilities: - Contribute towards Memory Design Validation of all types of custom memory macros and memory compilers - Perform functional verification, root cause design discrepancies, and help resolve them - Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them - Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them - Perform EM/IR analysis/simulations and evaluate impa...

Job Description: Memory design engineer. Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : We Prefer graduate or postgraduate from a University or Engineering School, in Electronic Engineering or equivalent Engineering Degree. You have some understanding of computer architecture and concepts. We expect you to have basic understanding of CMOS Transistors, their behaviors. We expect some basic understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Understanding of Power versus Per...

Job Title: Verification Engineer Job Location: Hyderabad Experience: 5 to 8 years Education: B.E./B.Tech/M.E./M.Tech in ECE, Electrical, or VLSI Design or equivalent Job Description: we are seeking a Verification Engineer specializing in Static Timing Analysis (STA) and Standard Cell Characterization for advanced memory product development (HBM, DRAM). The role involves working closely with cross-functional design and verification teams to ensure robust, high-performance memory solutions. Responsibilities: Perform Static Timing Analysis at block, cell, and full-chip levels for DRAM/memory designs. Characterize standard cells (up to 40% effort) using PrimeLib, SiliconSmart Create and validate...

Job Title: VLSI Verification Engineer Experience: 1 to 3 years Location: Hyderabad Job Description: We are seeking a highly motivated VLSI Verification Engineer with hands-on experience in circuit simulation, gate-level verification, and schematic analysis . The candidate will work on SPICE-based simulations, GLS with SDF back annotation, and transistor-level debugging to ensure design quality and sign-off readiness. Key Responsibilities: Develop, understand, and analyze block-level & memory schematics. Perform SPICE simulations (DC, transient) and correlate with gate-level models. Conduct gate-level simulations with SDF back annotation. Debug annotation issues, timing violations, and GLS fa...

Role Overview: You should have the ability to execute any small to mid-size customer project in VLSI Frontend, Backend, or Analog design with minimal supervision. Your role involves working as an individual contributor on tasks such as RTL Design/Module and providing support to junior engineers in various areas like Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your successful and on-time completion of assigned tasks will be crucial, with quality delivery approved by the project lead/manager. Key Responsibilities: - Work as an individual contributor on tasks such as RTL Design/Module and support junior engineers in various areas - Independe...

As a candidate for the position, you should have a Bachelor's or Master's Degree with 3-10 years of Analog Layout experience. It is essential to possess a good understanding of advanced semiconductor technology process and device physics. Your role will involve full-custom circuit layout/verification and RC extraction experience. Experience in one or more of the following areas is preferable: Mixed signal/analog/high-speed layout, e.g., PLL, IO, RF, PMIC, OSC, DC-DC converter, Temperature sensor, SRAM, TCAM, ROM, MRAM, ESD. You should be familiar with the Cadence Virtuoso environment and various industry physical verification tools (DRC, LVS, DFM, etc.). Experience in advanced technology nod...

As a Memory Layout Lead at our company, you will play a crucial role in driving the physical design and delivery of high-performance, low-power, and high-density semiconductor memory IPs including SRAM, ROM, register files, CAMs, and more. Your main responsibility will be to lead the end-to-end layout design and floorplanning for advanced-node memory IPs. Additionally, you will collaborate with circuit, CAD, and SoC integration teams to ensure optimal implementation. Your innovative layout techniques will be essential in achieving competitive density and performance targets. You will also be responsible for providing comprehensive IP deliverables such as GDSII, LEF, Liberty (.lib), Verilog m...

As an Embedded Firmware / Software Engineer at our company located in Bhiwadi, your role will involve the following responsibilities and qualifications: **Role Overview:** You will lead a team of Embedded hardware and firmware engineers, overseeing the SDLC Process and Embedded Design life cycle process of new and existing equipments. Your focus will be on product design, ensuring on-time updates and problem solving. You will also lead multiple cross functional R&D projects, guiding the team through project planning, design documentation, and developing a Knowledge base in R&D. Additionally, you will develop and own the Risk Management Plan, execute Risk Management activities, and ensure the...

Role & responsibilities: Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Core Requirements Basic understa...

As an experienced candidate with 2-5 years of experience, your role will primarily involve transistor level circuit design tasks such as critical path modeling. You will be responsible for designing and qualifying memory components like bit cells, sense amplifiers, and read/write circuitry. Additionally, you will be involved in the characterization and qualification of various memory components such as SRAM, RAMS, Register Files, and cad view generations. Qualifications Required: - 2-5 years of relevant experience in transistor level circuit design - Proficiency in critical path modeling - Experience in designing and qualifying memory components - Knowledge of characterization and qualificat...

We are hiring Flash/Analog NVM Memory Design Engineers with 5+ years of experience in Bangalore. The ideal candidate must have experience in Flash memory design, SRAM, and analog basics including charge pumps, regulators, and level shifters. Strong debugging and communication skills are essential. Responsibilities: Design, development, and validation of Flash/Analog NVM memory blocks. Quickly ramp up with memory design and architecture. Work on memory design involving Flash, SRAM, and Analog NVM. Apply strong analog design basics including charge pumps, regulators, low-voltage analog, and level shifters (LS). Perform debugging and ensure robust design quality. Collaborate with cross-function...

As a member of Tata Electronics, a subsidiary of Tata Sons Pvt. Ltd., you will be part of a pioneering initiative to establish India's first AI-enabled state-of-the-art Semiconductor Foundry. This cutting-edge facility is dedicated to producing chips for a variety of applications, including power management IC, display drivers, microcontrollers (MCU), and high-performance computing logic. These chips cater to the increasing demands of sectors such as automotive, computing, data storage, wireless communications, and artificial intelligence. Your role will involve integration responsibilities for the transfer of 28-90nm technologies from partner facilities, focusing on feature enhancements and...

Role & responsibilities Description: Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and ...

Job Description: As an Analog Layout Engineer at SILCOSYS Solutions Pvt. Ltd., you will be responsible for custom circuit layout, physical verification, and RC extraction. We are looking for a talented individual with 3 to 7 years of experience in the field. Proficiency in Cadence Virtuoso and a solid understanding of DRC, LVS, and DFM methodologies are essential for this role. Key Requirements: - Demonstrated expertise in AMS and high-speed layout design - Exposure to components such as Temperature Sensors, SRAM, TCAM, ROM, MRAM, ESD - Track record in advanced technology nodes, with experience in 5nm/3nm considered a plus - Familiarity with Totem EMIR tools and methodologies This position o...

You are a skilled embedded non-volatile memory (eNVM) Bitcell Layout Design Engineer / Lead interested in joining the eNVM team at Tata Electronics Private Limited (TEPL) to lead the development and optimization of eNVM bitcells. In this role, you will be responsible for designing layout and implementing eNVM bitcells across a wide range of Foundry CMOS technologies, from 130nm to 28nm, including BCD and advanced FinFET technology nodes. Your work will contribute to building high-yield, high-performance memory IP for various applications in automotive, IoT, and mobile markets. To excel in this position, you should ideally have 5-10 years of experience in the semiconductor industry with exper...

Develop CMOS embedded non-volatile memories such as MRAM and RRAM Design architecture and implement circuits with a focus on high speed, low power, and high-density designs Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow Perform design verification and drive physical layout design and verification Provide support and perform other duties as assigned The Impact You Will Have Contribute to the development of high-performance silicon chips and supporting software content Enhance the efficiency and perform...

What You'll Be Doing Develop CMOS embedded non-volatile memories, including MRAM and RRAM. Design architecture and implement circuits focused on high speed, low power, and high density. Perform schematic entry, circuit simulation, layout planning, layout supervision, and design verification. Interface with CAD and Frontend teams for memory compiler automation, EDA model generation, and verification flows. Drive physical layout design and verification processes. Provide technical support and perform other tasks as required. The Impact You Will Have Contribute to the development of high-performance silicon chips and memory-related software. Enhance the efficiency and performance of CMOS non-vo...

You will be responsible for designing and optimizing memory architectures for high-performance and low-power applications as a skilled SRAM & ROM IC Memory Design Engineer. Your main tasks will include designing, simulating, and verifying SRAM and ROM memory blocks while collaborating with cross-functional teams in circuit design, layout, verification, and technology development. Key responsibilities for this role include designing and developing SRAM and ROM memory architectures for various semiconductor applications, performing transistor-level circuit design and simulation, optimizing power, performance, and area (PPA) of memory designs, conducting timing, reliability, and variation analy...

As the Lead for the implementation of Ceremorphic AI hardware architecture and design of memory technologies, you will play a crucial role in integrating knowledge from various fields like AI, compilers, computer architecture, analog circuits, and memories. Your responsibilities will revolve around designing memory technologies including SRAM, Register Files, ROM generators, and other related components. Your key requirements for this position include a fundamental understanding of bit cell characteristics such as SNM, WM, Cell current, Standby current, data retention, among others. You should also possess expertise in dealing with process variability and circuit reliability issues that impa...