Member Technical Staff SerDes Design and Verification

As an experienced digital design engineer at Terminus Circuits, your role will involve a deep understanding of protocols such as USB, PCIE, MIPI, JEDEC, I2C, and SPI. Your primary responsibility will be to design and verify RTL code for high-speed SerDes-related digital blocks. You must have excellent verbal and written communication skills to effectively collaborate with the team. Key Responsibilities: - Design and verify RTL code for high-speed SerDes-related digital blocks - Synthesize complex SoCs block/top level and write timing constraints - Conduct formal verification RTL-to-netlist and netlist-to-netlist with DFT constraints - Perform post-layout STA closure and timing ECOs - Work on technology nodes 45nm and below Qualifications Required: - BE/B.Tech in VLSI/ECE - 3+ years of experience in verification of analog mixed signal blocks - Hands-on expertise in tools such as cadence AMS tools, Verilog, verilogA, and VAMS languages For any career-related inquiries and job applications, please contact hr@terminuscircuits.com.,