Lead PQC Research Engineer

6 - 10 years

8 - 18 Lacs

Posted:16 hours ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

Role & responsibilities

System Architecture & Design

  • Design FPGA-to-ASIC migration paths for PQC accelerators (Kyber, Dilithium, SHA-3).
    Integrate PQC cores with classical cryptography (AES/RSA) for hybrid security architectures. Define inter-module communication protocols (AXI, SPI, PCIe) and establish trust boundaries. Collaborate with AI engineers to enable adaptive encryption and anomaly detection layers (Q-AI layer).

Hardware Prototyping & Validation

  • Implement RTL designs in Verilog/VHDL and simulate using ModelSim or Vivado.
    Perform synthesis, timing closure, and validation on FPGA development boards. Prepare ASIC-ready netlists and coordinate with EDA workflows (Synopsys DC / Cadence Innovus).

Cryptography & Security Research

  • Benchmark PQC algorithms (Kyber, Dilithium, Falcon) on hardware platforms for latency, throughput, and entropy metrics.
    Contribute to white papers, IEEE publications, and internal ZenV technical briefs. Maintain alignment with global standards such as NIST PQC, DARPA HardSec, and the EU Quantum Flagship.

Documentation & Governance

  • Maintain detailed design logs in project management tools and ensure traceability.
    Participate in weekly engineering syncs, cross-domain reviews, and IP audits. Document research findings and technical decisions using structured repositories (Sphinx/Doxygen).

Preferred candidate profile

Education:

Technical Skills:

Soft Skills:

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